Revision 5fafdf24 hw/pflash_cfi02.c
b/hw/pflash_cfi02.c | ||
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/* |
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* CFI parallel flash with AMD command set emulation |
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*
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* |
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* Copyright (c) 2005 Jocelyn Mayer |
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* |
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* This library is free software; you can redistribute it and/or |
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} |
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/* update flash content on disk */ |
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static void pflash_update(pflash_t *pfl, int offset,
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static void pflash_update(pflash_t *pfl, int offset, |
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int size) |
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{ |
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int offset_end; |
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/* round to sectors */ |
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offset = offset >> 9; |
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offset_end = (offset_end + 511) >> 9; |
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bdrv_write(pfl->bs, offset, pfl->storage + (offset << 9),
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bdrv_write(pfl->bs, offset, pfl->storage + (offset << 9), |
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offset_end - offset); |
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} |
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} |
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offset -= (uint32_t)(long)pfl->storage; |
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else |
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offset -= pfl->base; |
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DPRINTF("%s: offset " TARGET_FMT_lx " %08x %d\n", __func__, |
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offset, value, width); |
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/* Set the device in I/O access mode */ |
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pfl->status = 0x00; |
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pflash_update(pfl, 0, pfl->total_len); |
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/* Let's wait 5 seconds before chip erase is done */ |
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qemu_mod_timer(pfl->timer,
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qemu_mod_timer(pfl->timer, |
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qemu_get_clock(vm_clock) + (ticks_per_sec * 5)); |
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break; |
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case 0x30: |
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pflash_update(pfl, offset, pfl->sector_len); |
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pfl->status = 0x00; |
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/* Let's wait 1/2 second before sector erase is done */ |
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qemu_mod_timer(pfl->timer,
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qemu_mod_timer(pfl->timer, |
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qemu_get_clock(vm_clock) + (ticks_per_sec / 2)); |
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break; |
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default: |
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pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off, |
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BlockDriverState *bs, |
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uint32_t sector_len, int nb_blocs, int width, |
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uint16_t id0, uint16_t id1,
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uint16_t id0, uint16_t id1, |
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uint16_t id2, uint16_t id3) |
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{ |
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pflash_t *pfl; |
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