Revision 5fafdf24 sparc-dis.c
| b/sparc-dis.c | ||
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| 359 | 359 |
#define FBFCC(x) (((x)&0x3)<<20) /* v9 */ |
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/* The order of the opcodes in the table is significant: |
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* The assembler requires that all instances of the same mnemonic must |
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be consecutive. If they aren't, the assembler will bomb at runtime. |
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|
| ... | ... | |
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>> ((8 * sizeof (int)) - bits) ) |
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static const char * const reg_names[] = |
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{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
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"o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
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"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
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"i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
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"o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", |
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"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", |
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"i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", |
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", |
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", |
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", |
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", |
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"f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
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"f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
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"f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", |
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"f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", |
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"f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55", |
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"f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63", |
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/* psr, wim, tbr, fpsr, cpsr are v8 only. */ |
| ... | ... | |
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/* Nonzero means that we have found a plus sign in the args |
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field of the opcode table. */ |
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int found_plus = 0; |
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/* Nonzero means we have an annulled branch. */ |
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int is_annulled = 0; |
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|
| ... | ... | |
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} /* while there are comma started args */ |
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(*info->fprintf_func) (stream, " "); |
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switch (*s) |
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{
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case '+': |
| ... | ... | |
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not before it. */ |
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if (found_plus) |
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imm_added_to_rs1 = 1; |
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if (imm <= 9) |
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(*info->fprintf_func) (stream, "%d", imm); |
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else |
| ... | ... | |
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case 'o': |
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(*info->fprintf_func) (stream, "%%asi"); |
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break; |
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case 'W': |
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(*info->fprintf_func) (stream, "%%tick"); |
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break; |
| ... | ... | |
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(*info->fprintf_func) (stream, "%d", X_RD (insn)); |
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break; |
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} |
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case 'M': |
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(*info->fprintf_func) (stream, "%%asr%d", X_RS1 (insn)); |
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break; |
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case 'm': |
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(*info->fprintf_func) (stream, "%%asr%d", X_RD (insn)); |
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break; |
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case 'L': |
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info->target = memaddr + SEX (X_DISP30 (insn), 30) * 4; |
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(*info->print_address_func) (info->target, info); |
| ... | ... | |
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&& X_RD (prev_insn) == X_RS1 (insn)) |
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{
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(*info->fprintf_func) (stream, "\t! "); |
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info->target =
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info->target = |
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((unsigned) 0xFFFFFFFF |
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& ((int) X_IMM22 (prev_insn) << 10)); |
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if (imm_added_to_rs1) |
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