Revision 5fafdf24 target-arm/cpu.h
b/target-arm/cpu.h | ||
---|---|---|
1 | 1 |
/* |
2 | 2 |
* ARM virtual CPU header |
3 |
*
|
|
3 |
* |
|
4 | 4 |
* Copyright (c) 2003 Fabrice Bellard |
5 | 5 |
* |
6 | 6 |
* This library is free software; you can redistribute it and/or |
... | ... | |
64 | 64 |
uint32_t banked_spsr[6]; |
65 | 65 |
uint32_t banked_r13[6]; |
66 | 66 |
uint32_t banked_r14[6]; |
67 |
|
|
67 |
|
|
68 | 68 |
/* These hold r8-r12. */ |
69 | 69 |
uint32_t usr_regs[5]; |
70 | 70 |
uint32_t fiq_regs[5]; |
71 |
|
|
71 |
|
|
72 | 72 |
/* cpsr flag cache for faster execution */ |
73 | 73 |
uint32_t CF; /* 0 or 1 */ |
74 | 74 |
uint32_t VF; /* V is the bit 31. All other bits are undefined */ |
... | ... | |
134 | 134 |
/* Temporary variables if we don't have spare fp regs. */ |
135 | 135 |
float32 tmp0s, tmp1s; |
136 | 136 |
float64 tmp0d, tmp1d; |
137 |
|
|
137 |
|
|
138 | 138 |
float_status fp_status; |
139 | 139 |
} vfp; |
140 | 140 |
|
... | ... | |
171 | 171 |
/* you can call this signal handler from your SIGBUS and SIGSEGV |
172 | 172 |
signal handlers to inform the virtual CPU of exceptions. non zero |
173 | 173 |
is returned if the signal was handled by the virtual CPU. */ |
174 |
int cpu_arm_signal_handler(int host_signum, void *pinfo,
|
|
174 |
int cpu_arm_signal_handler(int host_signum, void *pinfo, |
|
175 | 175 |
void *puc); |
176 | 176 |
|
177 | 177 |
#define CPSR_M (0x1f) |
... | ... | |
193 | 193 |
{ |
194 | 194 |
int ZF; |
195 | 195 |
ZF = (env->NZF == 0); |
196 |
return env->uncached_cpsr | (env->NZF & 0x80000000) | (ZF << 30) |
|
|
196 |
return env->uncached_cpsr | (env->NZF & 0x80000000) | (ZF << 30) | |
|
197 | 197 |
(env->CF << 29) | ((env->VF & 0x80000000) >> 3) | (env->QF << 27) |
198 | 198 |
| (env->thumb << 5); |
199 | 199 |
} |
Also available in: Unified diff