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/* |
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ARM Floating Point Instruction Classes |
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|c o n d|1 1 0 P|U|u|W|L| Rn |v| Fd |0|0|0|1| o f f s e t | CPDT |
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|c o n d|1 1 0 P|U|w|W|L| Rn |x| Fd |0|0|0|1| o f f s e t | CPDT |
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|c o n d|1 1 1 0|a|b|c|d|e| Fn |j| Fd |0|0|0|1|f|g|h|0|i| Fm | CPDO |
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|c o n d|1 1 1 0|a|b|c|L|e| Fn | Rd |0|0|0|1|f|g|h|1|i| Fm | CPRT |
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|c o n d|1 1 1 0|a|b|c|1|e| Fn |1|1|1|1|0|0|0|1|f|g|h|1|i| Fm | comparisons |
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CPDT data transfer instructions |
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LDF, STF, LFM, SFM |
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CPDO dyadic arithmetic instructions |
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ADF, MUF, SUF, RSF, DVF, RDF, |
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POW, RPW, RMF, FML, FDV, FRD, POL |
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CPDO monadic arithmetic instructions |
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MVF, MNF, ABS, RND, SQT, LOG, LGN, EXP, |
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SIN, COS, TAN, ASN, ACS, ATN, URD, NRM |
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CPRT joint arithmetic/data transfer instructions |
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FIX (arithmetic followed by load/store) |
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FLT (load/store followed by arithmetic) |
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W write back bit: 1 = update base register (Rn) |
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L load/store bit: 0 = store, 1 = load |
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Rn base register |
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Rd destination/source register
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Rd destination/source register |
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Fd floating point destination register |
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Fn floating point source register |
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Fm floating point source register or floating point constant |
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{ |
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extern const floatx80 floatx80Constant[]; |
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return floatx80Constant[nIndex]; |
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}
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} |
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static inline const float64 getDoubleConstant(const unsigned int nIndex) |
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{ |
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extern const float64 float64Constant[]; |
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return float64Constant[nIndex]; |
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}
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} |
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static inline const float32 getSingleConstant(const unsigned int nIndex) |
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extern const float32 float32Constant[]; |
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return float32Constant[nIndex]; |
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}
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} |
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extern unsigned int getRegisterCount(const unsigned int opcode); |
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extern unsigned int getDestinationSize(const unsigned int opcode); |
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