Revision 5fafdf24 target-arm/op.c

b/target-arm/op.c
1 1
/*
2 2
 *  ARM micro operations
3
 * 
3
 *
4 4
 *  Copyright (c) 2003 Fabrice Bellard
5 5
 *  Copyright (c) 2005 CodeSourcery, LLC
6 6
 *
......
774 774
  }
775 775
  else
776 776
    T0 = res;
777
  
777
 
778 778
  FORCE_RET();
779 779
}
780 780

  
......
792 792
  }
793 793
  else
794 794
    T0 = res;
795
  
795
 
796 796
  FORCE_RET();
797 797
}
798 798

  
......
1127 1127
void OPPROTO op_vfp_mrrd(void)
1128 1128
{
1129 1129
    CPU_DoubleU u;
1130
    
1130
   
1131 1131
    u.d = FT0d;
1132 1132
    T0 = u.l.lower;
1133 1133
    T1 = u.l.upper;
......
1136 1136
void OPPROTO op_vfp_mdrr(void)
1137 1137
{
1138 1138
    CPU_DoubleU u;
1139
    
1139
   
1140 1140
    u.l.lower = T0;
1141 1141
    u.l.upper = T1;
1142 1142
    FT0d = u.d;

Also available in: Unified diff