Revision 5fafdf24 target-arm/op_iwmmxt.c
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/* |
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* iwMMXt micro operations for XScale. |
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*
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* |
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* Copyright (c) 2007 OpenedHand, Ltd. |
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* Written by Andrzej Zaborowski <andrew@openedhand.com> |
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* |
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void OPPROTO op_iwmmxt_macsw_M0_wRn(void) |
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{ |
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#define MACS(SHR) ( \ |
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EXTEND16((M0 >> SHR) & 0xffff) * EXTEND16S((M1 >> SHR) & 0xffff))
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EXTEND16((M0 >> SHR) & 0xffff) * EXTEND16S((M1 >> SHR) & 0xffff)) |
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M0 = (int64_t) (MACS(0) + MACS(16) + MACS(32) + MACS(48)); |
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#undef MACS |
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} |
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{ |
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#define MACU(SHR) ( \ |
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(uint32_t) ((M0 >> SHR) & 0xffff) * \ |
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(uint32_t) ((M1 >> SHR) & 0xffff))
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(uint32_t) ((M1 >> SHR) & 0xffff)) |
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M0 = MACU(0) + MACU(16) + MACU(32) + MACU(48); |
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#undef MACU |
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} |
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