Revision 5fafdf24 target-i386/cpu.h
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/* |
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* i386 virtual CPU header |
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*
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* |
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* Copyright (c) 2003 Fabrice Bellard |
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* |
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* This library is free software; you can redistribute it and/or |
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#define NT_MASK 0x00004000 |
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#define RF_MASK 0x00010000 |
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#define VM_MASK 0x00020000 |
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#define AC_MASK 0x00040000
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#define AC_MASK 0x00040000 |
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#define VIF_MASK 0x00080000 |
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#define VIP_MASK 0x00100000 |
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#define ID_MASK 0x00200000 |
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int i32; |
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int64_t i64; |
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} fp_convert; |
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float_status sse_status; |
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uint32_t mxcsr; |
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XMMReg xmm_regs[CPU_NB_REGS]; |
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uint32_t saved_esp; |
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int native_fp_regs; /* if true, the FPU state is in the native CPU regs */ |
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#endif |
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/* exception/interrupt handling */ |
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jmp_buf jmp_env; |
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int exception_index; |
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target_ulong exception_next_eip; |
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target_ulong dr[8]; /* debug registers */ |
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uint32_t smbase; |
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int interrupt_request;
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int interrupt_request; |
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int user_mode_only; /* user mode only simulation */ |
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int old_exception; /* exception in flight */ |
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uint32_t cpuid_model[12]; |
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uint32_t cpuid_ext2_features; |
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uint32_t cpuid_apic_id; |
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#ifdef USE_KQEMU |
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int kqemu_enabled; |
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int last_io_time; |
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/* this function must always be used to load data in the segment |
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cache: it synchronizes the hflags with the segment cache values */ |
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static inline void cpu_x86_load_seg_cache(CPUX86State *env,
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static inline void cpu_x86_load_seg_cache(CPUX86State *env, |
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int seg_reg, unsigned int selector, |
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target_ulong base, |
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unsigned int limit,
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unsigned int limit, |
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unsigned int flags) |
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{ |
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SegmentCache *sc; |
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unsigned int new_hflags; |
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sc = &env->segs[seg_reg]; |
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sc->selector = selector; |
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sc->base = base; |
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/* long mode */ |
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env->hflags |= HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK; |
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env->hflags &= ~(HF_ADDSEG_MASK); |
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} else
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} else |
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#endif |
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{ |
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/* legacy / compatibility case */ |
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>> (DESC_B_SHIFT - HF_SS32_SHIFT); |
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if (env->hflags & HF_CS64_MASK) { |
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/* zero base assumed for DS, ES and SS in long mode */ |
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} else if (!(env->cr[0] & CR0_PE_MASK) ||
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} else if (!(env->cr[0] & CR0_PE_MASK) || |
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(env->eflags & VM_MASK) || |
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!(env->hflags & HF_CS32_MASK)) { |
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/* XXX: try to avoid this test. The problem comes from the |
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translate-i386.c. */ |
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new_hflags |= HF_ADDSEG_MASK; |
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} else { |
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new_hflags |= ((env->segs[R_DS].base |
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new_hflags |= ((env->segs[R_DS].base | |
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env->segs[R_ES].base | |
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env->segs[R_SS].base) != 0) <<
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env->segs[R_SS].base) != 0) << |
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HF_ADDSEG_SHIFT; |
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} |
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env->hflags = (env->hflags &
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env->hflags = (env->hflags & |
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~(HF_SS32_MASK | HF_ADDSEG_MASK)) | new_hflags; |
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} |
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} |
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/* you can call this signal handler from your SIGBUS and SIGSEGV |
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signal handlers to inform the virtual CPU of exceptions. non zero |
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is returned if the signal was handled by the virtual CPU. */ |
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int cpu_x86_signal_handler(int host_signum, void *pinfo,
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int cpu_x86_signal_handler(int host_signum, void *pinfo, |
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void *puc); |
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void cpu_x86_set_a20(CPUX86State *env, int a20_state); |
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