Revision 5fafdf24 target-mips/op_helper.c
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/* |
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* MIPS emulation helpers for qemu. |
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*
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* |
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* Copyright (c) 2004-2005 Jocelyn Mayer |
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* |
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* This library is free software; you can redistribute it and/or |
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#endif |
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#endif /* TARGET_MIPS64 */ |
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#if defined(CONFIG_USER_ONLY)
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#if defined(CONFIG_USER_ONLY) |
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void do_mfc0_random (void) |
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{
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cpu_abort(env, "mfc0 random\n"); |
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enable = GET_FP_ENABLE(env->fpu->fcr31); |
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/* determine current flags */
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/* determine current flags */ |
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if (flags & float_flag_invalid) {
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cpuflags |= FP_INVALID; |
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cause |= FP_INVALID & enable; |
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} |
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if (flags & float_flag_divbyzero) {
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cpuflags |= FP_DIV0;
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cpuflags |= FP_DIV0; |
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cause |= FP_DIV0 & enable; |
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} |
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if (flags & float_flag_overflow) {
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cpuflags |= FP_OVERFLOW;
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cpuflags |= FP_OVERFLOW; |
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cause |= FP_OVERFLOW & enable; |
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} |
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if (flags & float_flag_underflow) {
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cpuflags |= FP_UNDERFLOW;
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cpuflags |= FP_UNDERFLOW; |
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cause |= FP_UNDERFLOW & enable; |
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} |
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if (flags & float_flag_inexact) {
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cpuflags |= FP_INEXACT;
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cpuflags |= FP_INEXACT; |
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cause |= FP_INEXACT & enable; |
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} |
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SET_FP_FLAGS(env->fpu->fcr31, cpuflags); |
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} |
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} |
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#if !defined(CONFIG_USER_ONLY)
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#if !defined(CONFIG_USER_ONLY) |
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static void do_unaligned_access (target_ulong addr, int is_write, int is_user, void *retaddr); |
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