Revision 5fafdf24 target-ppc/translate_init.c
b/target-ppc/translate_init.c | ||
---|---|---|
1 | 1 |
/* |
2 | 2 |
* PowerPC CPU initialization for qemu. |
3 |
*
|
|
3 |
* |
|
4 | 4 |
* Copyright (c) 2003-2007 Jocelyn Mayer |
5 | 5 |
* |
6 | 6 |
* This library is free software; you can redistribute it and/or |
... | ... | |
2142 | 2142 |
/* Allocate hardware IRQ controller */ |
2143 | 2143 |
ppc6xx_irq_init(env); |
2144 | 2144 |
break; |
2145 |
|
|
2145 |
|
|
2146 | 2146 |
case CPU_PPC_G2: /* PowerPC G2 family */ |
2147 | 2147 |
case CPU_PPC_G2H4: |
2148 | 2148 |
case CPU_PPC_G2gp: |
... | ... | |
2577 | 2577 |
return ret; |
2578 | 2578 |
} |
2579 | 2579 |
|
2580 |
static int register_dblind_insn (opc_handler_t **ppc_opcodes,
|
|
2580 |
static int register_dblind_insn (opc_handler_t **ppc_opcodes, |
|
2581 | 2581 |
unsigned char idx1, unsigned char idx2, |
2582 | 2582 |
unsigned char idx3, opc_handler_t *handler) |
2583 | 2583 |
{ |
Also available in: Unified diff