Revision 5fafdf24 tests/test-i386.c

b/tests/test-i386.c
1 1
/*
2 2
 *  x86 CPU test
3
 * 
3
 *
4 4
 *  Copyright (c) 2003 Fabrice Bellard
5 5
 *
6 6
 *  This program is free software; you can redistribute it and/or modify
......
470 470
#define OP imul
471 471
#include "test-i386-muldiv.h"
472 472

  
473
void test_imulw2(long op0, long op1) 
473
void test_imulw2(long op0, long op1)
474 474
{
475 475
    long res, s1, s0, flags;
476 476
    s0 = op0;
......
479 479
    flags = 0;
480 480
    asm volatile ("push %4\n\t"
481 481
         "popf\n\t"
482
         "imulw %w2, %w0\n\t" 
482
         "imulw %w2, %w0\n\t"
483 483
         "pushf\n\t"
484 484
         "pop %1\n\t"
485 485
         : "=q" (res), "=g" (flags)
......
488 488
           "imulw", s0, s1, res, flags & CC_MASK);
489 489
}
490 490

  
491
void test_imull2(long op0, long op1) 
491
void test_imull2(long op0, long op1)
492 492
{
493 493
    long res, s1, s0, flags;
494 494
    s0 = op0;
......
497 497
    flags = 0;
498 498
    asm volatile ("push %4\n\t"
499 499
         "popf\n\t"
500
         "imull %k2, %k0\n\t" 
500
         "imull %k2, %k0\n\t"
501 501
         "pushf\n\t"
502 502
         "pop %1\n\t"
503 503
         : "=q" (res), "=g" (flags)
......
507 507
}
508 508

  
509 509
#if defined(__x86_64__)
510
void test_imulq2(long op0, long op1) 
510
void test_imulq2(long op0, long op1)
511 511
{
512 512
    long res, s1, s0, flags;
513 513
    s0 = op0;
......
516 516
    flags = 0;
517 517
    asm volatile ("push %4\n\t"
518 518
         "popf\n\t"
519
         "imulq %2, %0\n\t" 
519
         "imulq %2, %0\n\t"
520 520
         "pushf\n\t"
521 521
         "pop %1\n\t"
522 522
         : "=q" (res), "=g" (flags)
......
739 739
        uint32_t ignored[4];
740 740
        long double fpregs[8];
741 741
    } float_env32;
742
    
742
   
743 743
    asm volatile ("fnstenv %0\n" : : "m" (float_env32));
744 744
    float_env32.fpus &= ~0x7f;
745 745
    asm volatile ("fldenv %0\n" : : "m" (float_env32));
......
758 758
        "fstsw %%ax\n"
759 759
        : "=a" (fpus)
760 760
        : "t" (a), "u" (b));
761
    printf("fcom(%f %f)=%04lx \n", 
761
    printf("fcom(%f %f)=%04lx \n",
762 762
           a, b, fpus & (0x4500 | FPUS_EMASK));
763 763
    fpu_clear_exceptions();
764 764
    asm("fucom %2\n"
765 765
        "fstsw %%ax\n"
766 766
        : "=a" (fpus)
767 767
        : "t" (a), "u" (b));
768
    printf("fucom(%f %f)=%04lx\n", 
768
    printf("fucom(%f %f)=%04lx\n",
769 769
           a, b, fpus & (0x4500 | FPUS_EMASK));
770 770
    if (TEST_FCOMI) {
771 771
        /* test f(u)comi instruction */
......
776 776
            "pop %0\n"
777 777
            : "=r" (eflags), "=a" (fpus)
778 778
            : "t" (a), "u" (b));
779
        printf("fcomi(%f %f)=%04lx %02lx\n", 
779
        printf("fcomi(%f %f)=%04lx %02lx\n",
780 780
               a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
781 781
        fpu_clear_exceptions();
782 782
        asm("fucomi %3, %2\n"
......
785 785
            "pop %0\n"
786 786
            : "=r" (eflags), "=a" (fpus)
787 787
            : "t" (a), "u" (b));
788
        printf("fucomi(%f %f)=%04lx %02lx\n", 
788
        printf("fucomi(%f %f)=%04lx %02lx\n",
789 789
               a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
790 790
    }
791 791
    fpu_clear_exceptions();
......
813 813
    printf("(float)%f = %f\n", a, fa);
814 814
    printf("(long double)%f = %Lf\n", a, la);
815 815
    printf("a=" FMT64X "\n", *(uint64_t *)&a);
816
    printf("la=" FMT64X " %04x\n", *(uint64_t *)&la, 
816
    printf("la=" FMT64X " %04x\n", *(uint64_t *)&la,
817 817
           *(unsigned short *)((char *)(&la) + 8));
818 818

  
819 819
    /* test all roundings */
......
855 855

  
856 856
    asm("fbstp %0" : "=m" (bcd[0]) : "t" (a) : "st");
857 857
    asm("fbld %1" : "=t" (b) : "m" (bcd[0]));
858
    printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n", 
858
    printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n",
859 859
           a, bcd[4], bcd[3], bcd[2], bcd[1], bcd[0], b);
860 860
}
861 861

  
......
1041 1041
    TEST_BCD(aaa, 0x12340306, 0, (CC_C | CC_A));
1042 1042
    TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A));
1043 1043
    TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A));
1044
    
1044
   
1045 1045
    TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
1046 1046
    TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
1047 1047
    TEST_BCD(aas, 0x1234040a, CC_A, (CC_C | CC_A));
......
1157 1157
            else
1158 1158
                op1 = op0;
1159 1159
            op2 = 0x6532432432434;
1160
            asm("cmpxchg8b %1\n" 
1160
            asm("cmpxchg8b %1\n"
1161 1161
                "pushf\n"
1162 1162
                "pop %2\n"
1163 1163
                : "=A" (op0), "=m" (op1), "=g" (eflags)
1164 1164
                : "0" (op0), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
1165
            printf("cmpxchg8b: op0=" FMT64X " op1=" FMT64X " CC=%02lx\n", 
1165
            printf("cmpxchg8b: op0=" FMT64X " op1=" FMT64X " CC=%02lx\n",
1166 1166
                    op0, op1, eflags & CC_Z);
1167 1167
        }
1168 1168
    }
......
1276 1276

  
1277 1277
    segoff.seg = MK_SEL(2);
1278 1278
    segoff.offset = 0xabcdef12;
1279
    asm volatile("lfs %2, %0\n\t" 
1279
    asm volatile("lfs %2, %0\n\t"
1280 1280
                 "movl %%fs, %1\n\t"
1281
                 : "=r" (res), "=g" (res2) 
1281
                 : "=r" (res), "=g" (res2)
1282 1282
                 : "m" (segoff));
1283 1283
    printf("FS:reg = %04x:%08x\n", res2, res);
1284 1284

  
......
1317 1317
    modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1318 1318

  
1319 1319
    /* call the first function */
1320
    asm volatile ("lcall %1, %2" 
1320
    asm volatile ("lcall %1, %2"
1321 1321
                  : "=a" (res)
1322 1322
                  : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc");
1323 1323
    printf("func1() = 0x%08x\n", res);
1324
    asm volatile ("lcall %2, %3" 
1324
    asm volatile ("lcall %2, %3"
1325 1325
                  : "=a" (res), "=c" (res2)
1326 1326
                  : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc");
1327 1327
    printf("func2() = 0x%08x spdec=%d\n", res, res2);
1328
    asm volatile ("lcall %1, %2" 
1328
    asm volatile ("lcall %1, %2"
1329 1329
                  : "=a" (res)
1330 1330
                  : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
1331 1331
    printf("func3() = 0x%08x\n", res);
......
1373 1373
        asm volatile ("mov %%cs, %0" : "=r" (cs_sel));
1374 1374

  
1375 1375
        asm volatile ("push %1\n"
1376
                      "call func_lret\n" 
1376
                      "call func_lret\n"
1377 1377
                      : "=a" (res)
1378 1378
                      : "r" (cs_sel) : "memory", "cc");
1379 1379
        printf("func_lret=" FMTLX "\n", res);
......
1381 1381
        /* NOTE: we assume that &func_lret < 4GB */
1382 1382
        desc.offset = (long)&func_lret;
1383 1383
        desc.seg = cs_sel;
1384
        
1384
       
1385 1385
        asm volatile ("xor %%rax, %%rax\n"
1386 1386
                      "rex64 lcall %1\n"
1387 1387
                      : "=a" (res)
1388
                      : "m" (desc) 
1388
                      : "m" (desc)
1389 1389
                      : "memory", "cc");
1390 1390
        printf("func_lret2=" FMTLX "\n", res);
1391 1391

  
......
1400 1400
        printf("func_lret3=" FMTLX "\n", res);
1401 1401
    }
1402 1402
#else
1403
    asm volatile ("push %%cs ; call %1" 
1403
    asm volatile ("push %%cs ; call %1"
1404 1404
                  : "=a" (res)
1405 1405
                  : "m" (func_lret): "memory", "cc");
1406 1406
    printf("func_lret=" FMTLX "\n", res);
1407 1407

  
1408
    asm volatile ("pushf ; push %%cs ; call %1" 
1408
    asm volatile ("pushf ; push %%cs ; call %1"
1409 1409
                  : "=a" (res)
1410 1410
                  : "m" (func_iret): "memory", "cc");
1411 1411
    printf("func_iret=" FMTLX "\n", res);
......
1472 1472
   TEST_STRING(stos, "");
1473 1473
   TEST_STRING(stos, "rep ");
1474 1474
   TEST_STRING(lods, ""); /* to verify stos */
1475
   TEST_STRING(lods, "rep "); 
1475
   TEST_STRING(lods, "rep ");
1476 1476
   TEST_STRING(movs, "");
1477 1477
   TEST_STRING(movs, "rep ");
1478 1478
   TEST_STRING(lods, ""); /* to verify stos */
......
1526 1526
    uint8_t *vm86_mem;
1527 1527
    int seg, ret;
1528 1528

  
1529
    vm86_mem = mmap((void *)0x00000000, 0x110000, 
1530
                    PROT_WRITE | PROT_READ | PROT_EXEC, 
1529
    vm86_mem = mmap((void *)0x00000000, 0x110000,
1530
                    PROT_WRITE | PROT_READ | PROT_EXEC,
1531 1531
                    MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
1532 1532
    if (vm86_mem == MAP_FAILED) {
1533 1533
        printf("ERROR: could not map vm86 memory");
......
1550 1550

  
1551 1551
    /* move code to proper address. We use the same layout as a .com
1552 1552
       dos program. */
1553
    memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP, 
1553
    memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP,
1554 1554
           &vm86_code_start, &vm86_code_end - &vm86_code_start);
1555 1555

  
1556 1556
    /* mark int 0x21 as being emulated */
......
1562 1562
        case VM86_INTx:
1563 1563
            {
1564 1564
                int int_num, ah, v;
1565
                
1565
               
1566 1566
                int_num = VM86_ARG(ret);
1567 1567
                if (int_num != 0x21)
1568 1568
                    goto unknown_int;
......
1665 1665
{
1666 1666
    struct sigaction act;
1667 1667
    volatile int val;
1668
    
1668
   
1669 1669
    act.sa_sigaction = sig_handler;
1670 1670
    sigemptyset(&act.sa_mask);
1671 1671
    act.sa_flags = SA_SIGINFO | SA_NODEFER;
......
1718 1718
        ldt.seg_not_present = 1;
1719 1719
        ldt.useable = 1;
1720 1720
        modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1721
        
1721
       
1722 1722
        if (setjmp(jmp_env) == 0) {
1723 1723
            /* segment not present */
1724 1724
            asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
......
1743 1743
        /* read from an invalid address */
1744 1744
        v1 = *(char *)0x1234;
1745 1745
    }
1746
    
1746
   
1747 1747
    /* test illegal instruction reporting */
1748 1748
    printf("UD2 exception:\n");
1749 1749
    if (setjmp(jmp_env) == 0) {
......
1755 1755
        /* now execute an invalid instruction */
1756 1756
        asm volatile("lock nop");
1757 1757
    }
1758
    
1758
   
1759 1759
    printf("INT exception:\n");
1760 1760
    if (setjmp(jmp_env) == 0) {
1761 1761
        asm volatile ("int $0xfd");
......
1827 1827
        asm volatile ("pushf\n"
1828 1828
                      "orl $0x00100, (%%esp)\n"
1829 1829
                      "popf\n"
1830
                      "movl $0xabcd, %0\n" 
1830
                      "movl $0xabcd, %0\n"
1831 1831
                      "movl $0x0, %0\n" : "=m" (val) : : "cc", "memory");
1832 1832
    }
1833 1833
    printf("val=0x%x\n", val);
......
1858 1858
    asm volatile ("pushf\n"
1859 1859
                  "orl $0x00100, (%%esp)\n"
1860 1860
                  "popf\n"
1861
                  "movl $0xabcd, %0\n" 
1861
                  "movl $0xabcd, %0\n"
1862 1862

  
1863 1863
                  /* jmp test */
1864 1864
                  "movl $3, %%ecx\n"
......
1884 1884
                  "rep cmpsb\n"
1885 1885
                  "movl $4, %%ecx\n"
1886 1886
                  "rep cmpsb\n"
1887
                  
1887
                 
1888 1888
                  /* getpid() syscall: single step should skip one
1889 1889
                     instruction */
1890 1890
                  "movl $20, %%eax\n"
1891 1891
                  "int $0x80\n"
1892 1892
                  "movl $0, %%eax\n"
1893
                  
1893
                 
1894 1894
                  /* when modifying SS, trace is not done on the next
1895 1895
                     instruction */
1896 1896
                  "movl %%ss, %%ecx\n"
......
1906 1906
                  "popl %%ss\n"
1907 1907
                  "addl $1, %0\n"
1908 1908
                  "movl $1, %%eax\n"
1909
                  
1909
                 
1910 1910
                  "pushf\n"
1911 1911
                  "andl $~0x00100, (%%esp)\n"
1912 1912
                  "popf\n"
1913
                  : "=m" (val) 
1914
                  : 
1913
                  : "=m" (val)
1914
                  :
1915 1915
                  : "cc", "memory", "eax", "ecx", "esi", "edi");
1916 1916
    printf("val=%d\n", val);
1917 1917
    for(i = 0; i < 4; i++)
......
2282 2282
        " fxrstor %0\n"
2283 2283
        " fxsave %1\n"
2284 2284
        " fninit\n"
2285
        : "=m" (*(uint32_t *)fp2), "=m" (*(uint32_t *)fp) 
2285
        : "=m" (*(uint32_t *)fp2), "=m" (*(uint32_t *)fp)
2286 2286
        : "m" (a), "m" (b));
2287 2287
    printf("fpuc=%04x\n", fp->fpuc);
2288 2288
    printf("fpus=%04x\n", fp->fpus);
2289 2289
    printf("fptag=%04x\n", fp->fptag);
2290 2290
    for(i = 0; i < 3; i++) {
2291 2291
        printf("ST%d: " FMT64X " %04x\n",
2292
               i, 
2292
               i,
2293 2293
               *(uint64_t *)&fp->fpregs1[i * 16],
2294 2294
               *(uint16_t *)&fp->fpregs1[i * 16 + 8]);
2295 2295
    }
......
2301 2301
#endif
2302 2302
    for(i = 0; i < nb_xmm; i++) {
2303 2303
        printf("xmm%d: " FMT64X "" FMT64X "\n",
2304
               i, 
2304
               i,
2305 2305
               *(uint64_t *)&fp->xmm_regs[i * 16],
2306 2306
               *(uint64_t *)&fp->xmm_regs[i * 16 + 8]);
2307 2307
    }
......
2341 2341

  
2342 2342
    MMX_OP2(pmulhuw);
2343 2343
    MMX_OP2(pmulhw);
2344
    
2344
   
2345 2345
    MMX_OP2(psubsb);
2346 2346
    MMX_OP2(psubsw);
2347 2347
    MMX_OP2(pminsw);
......
2380 2380

  
2381 2381
    asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
2382 2382
    printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
2383
    
2383
   
2384 2384
    asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
2385 2385
    printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
2386 2386

  
......
2392 2392
        a.q[1] = test_values[0][1];
2393 2393
        b.q[0] = test_values[1][0];
2394 2394
        b.q[1] = test_values[1][1];
2395
        asm volatile("maskmovq %1, %0" : 
2395
        asm volatile("maskmovq %1, %0" :
2396 2396
                     : "y" (a.q[0]), "y" (b.q[0]), "D" (&r)
2397
                     : "memory"); 
2398
        printf("%-9s: r=" FMT64X " a=" FMT64X " b=" FMT64X "\n", 
2399
               "maskmov", 
2400
               r.q[0], 
2401
               a.q[0], 
2397
                     : "memory");
2398
        printf("%-9s: r=" FMT64X " a=" FMT64X " b=" FMT64X "\n",
2399
               "maskmov",
2400
               r.q[0],
2401
               a.q[0],
2402 2402
               b.q[0]);
2403
        asm volatile("maskmovdqu %1, %0" : 
2403
        asm volatile("maskmovdqu %1, %0" :
2404 2404
                     : "x" (a.dq), "x" (b.dq), "D" (&r)
2405
                     : "memory"); 
2406
        printf("%-9s: r=" FMT64X "" FMT64X " a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X "\n", 
2407
               "maskmov", 
2408
               r.q[1], r.q[0], 
2409
               a.q[1], a.q[0], 
2405
                     : "memory");
2406
        printf("%-9s: r=" FMT64X "" FMT64X " a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X "\n",
2407
               "maskmov",
2408
               r.q[1], r.q[0],
2409
               a.q[1], a.q[0],
2410 2410
               b.q[1], b.q[0]);
2411 2411
    }
2412 2412

  
......
2506 2506
        SSE_OPS(cmpnlt);
2507 2507
        SSE_OPS(cmpnle);
2508 2508
        SSE_OPS(cmpord);
2509
        
2510
        
2509
       
2510
       
2511 2511
        a.d[0] = 2.7;
2512 2512
        a.d[1] = -3.4;
2513 2513
        b.d[0] = 45.7;

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