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/* Interface between the opcode library and its callers.
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   Written by Cygnus Support, 1993.
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   The opcode library (libopcodes.a) provides instruction decoders for
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   a large variety of instruction sets, callable with an identical
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   interface, for making instruction-processing programs more independent
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   of the instruction set being processed.  */
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#ifndef DIS_ASM_H
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#define DIS_ASM_H
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#define PARAMS(x) x
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typedef void *PTR;
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typedef uint64_t bfd_vma;
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typedef int64_t bfd_signed_vma;
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typedef uint8_t bfd_byte;
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#define sprintf_vma(s,x) sprintf (s, "%0" PRIx64, x)
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#define BFD64
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enum bfd_flavour {
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  bfd_target_unknown_flavour,
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  bfd_target_aout_flavour,
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  bfd_target_coff_flavour,
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  bfd_target_ecoff_flavour,
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  bfd_target_elf_flavour,
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  bfd_target_ieee_flavour,
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  bfd_target_nlm_flavour,
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  bfd_target_oasys_flavour,
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  bfd_target_tekhex_flavour,
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  bfd_target_srec_flavour,
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  bfd_target_ihex_flavour,
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  bfd_target_som_flavour,
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  bfd_target_os9k_flavour,
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  bfd_target_versados_flavour,
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  bfd_target_msdos_flavour,
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  bfd_target_evax_flavour
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};
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enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
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enum bfd_architecture
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{
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  bfd_arch_unknown,    /* File arch not known */
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  bfd_arch_obscure,    /* Arch known, not one of these */
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  bfd_arch_m68k,       /* Motorola 68xxx */
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#define bfd_mach_m68000 1
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#define bfd_mach_m68008 2
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#define bfd_mach_m68010 3
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#define bfd_mach_m68020 4
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#define bfd_mach_m68030 5
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#define bfd_mach_m68040 6
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#define bfd_mach_m68060 7
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#define bfd_mach_cpu32  8
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#define bfd_mach_mcf5200  9
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#define bfd_mach_mcf5206e 10
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#define bfd_mach_mcf5307  11
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#define bfd_mach_mcf5407  12
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#define bfd_mach_mcf528x  13
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#define bfd_mach_mcfv4e   14
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#define bfd_mach_mcf521x   15
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#define bfd_mach_mcf5249   16
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#define bfd_mach_mcf547x   17
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#define bfd_mach_mcf548x   18
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  bfd_arch_vax,        /* DEC Vax */  
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  bfd_arch_i960,       /* Intel 960 */
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     /* The order of the following is important.
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       lower number indicates a machine type that
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       only accepts a subset of the instructions
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       available to machines with higher numbers.
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       The exception is the "ca", which is
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       incompatible with all other machines except
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       "core". */
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#define bfd_mach_i960_core      1
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#define bfd_mach_i960_ka_sa     2
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#define bfd_mach_i960_kb_sb     3
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#define bfd_mach_i960_mc        4
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#define bfd_mach_i960_xa        5
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#define bfd_mach_i960_ca        6
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#define bfd_mach_i960_jx        7
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#define bfd_mach_i960_hx        8
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  bfd_arch_a29k,       /* AMD 29000 */
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  bfd_arch_sparc,      /* SPARC */
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#define bfd_mach_sparc                 1
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/* The difference between v8plus and v9 is that v9 is a true 64 bit env.  */
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#define bfd_mach_sparc_sparclet        2
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#define bfd_mach_sparc_sparclite       3
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#define bfd_mach_sparc_v8plus          4
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#define bfd_mach_sparc_v8plusa         5 /* with ultrasparc add'ns.  */
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#define bfd_mach_sparc_sparclite_le    6
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#define bfd_mach_sparc_v9              7
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#define bfd_mach_sparc_v9a             8 /* with ultrasparc add'ns.  */
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#define bfd_mach_sparc_v8plusb         9 /* with cheetah add'ns.  */
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#define bfd_mach_sparc_v9b             10 /* with cheetah add'ns.  */
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/* Nonzero if MACH has the v9 instruction set.  */
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#define bfd_mach_sparc_v9_p(mach) \
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  ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
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   && (mach) != bfd_mach_sparc_sparclite_le)
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  bfd_arch_mips,       /* MIPS Rxxxx */
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#define bfd_mach_mips3000              3000
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#define bfd_mach_mips3900              3900
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#define bfd_mach_mips4000              4000
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#define bfd_mach_mips4010              4010
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#define bfd_mach_mips4100              4100
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#define bfd_mach_mips4300              4300
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#define bfd_mach_mips4400              4400
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#define bfd_mach_mips4600              4600
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#define bfd_mach_mips4650              4650
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#define bfd_mach_mips5000              5000
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#define bfd_mach_mips6000              6000
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#define bfd_mach_mips8000              8000
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#define bfd_mach_mips10000             10000
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#define bfd_mach_mips16                16
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  bfd_arch_i386,       /* Intel 386 */
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#define bfd_mach_i386_i386 0
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#define bfd_mach_i386_i8086 1
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#define bfd_mach_i386_i386_intel_syntax 2
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#define bfd_mach_x86_64 3
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#define bfd_mach_x86_64_intel_syntax 4
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  bfd_arch_we32k,      /* AT&T WE32xxx */
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  bfd_arch_tahoe,      /* CCI/Harris Tahoe */
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  bfd_arch_i860,       /* Intel 860 */
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  bfd_arch_romp,       /* IBM ROMP PC/RT */
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  bfd_arch_alliant,    /* Alliant */
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  bfd_arch_convex,     /* Convex */
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  bfd_arch_m88k,       /* Motorola 88xxx */
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  bfd_arch_pyramid,    /* Pyramid Technology */
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  bfd_arch_h8300,      /* Hitachi H8/300 */
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#define bfd_mach_h8300   1
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#define bfd_mach_h8300h  2
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#define bfd_mach_h8300s  3
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  bfd_arch_powerpc,    /* PowerPC */
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#define bfd_mach_ppc           0
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#define bfd_mach_ppc64         1
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#define bfd_mach_ppc_403       403
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#define bfd_mach_ppc_403gc     4030
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#define bfd_mach_ppc_505       505
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#define bfd_mach_ppc_601       601
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#define bfd_mach_ppc_602       602
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#define bfd_mach_ppc_603       603
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#define bfd_mach_ppc_ec603e    6031
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#define bfd_mach_ppc_604       604
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#define bfd_mach_ppc_620       620
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#define bfd_mach_ppc_630       630
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#define bfd_mach_ppc_750       750
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#define bfd_mach_ppc_860       860
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#define bfd_mach_ppc_a35       35
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#define bfd_mach_ppc_rs64ii    642
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#define bfd_mach_ppc_rs64iii   643
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#define bfd_mach_ppc_7400      7400
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  bfd_arch_rs6000,     /* IBM RS/6000 */
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  bfd_arch_hppa,       /* HP PA RISC */
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  bfd_arch_d10v,       /* Mitsubishi D10V */
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  bfd_arch_z8k,        /* Zilog Z8000 */
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#define bfd_mach_z8001         1
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#define bfd_mach_z8002         2
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  bfd_arch_h8500,      /* Hitachi H8/500 */
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  bfd_arch_sh,         /* Hitachi SH */
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#define bfd_mach_sh            1
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#define bfd_mach_sh2        0x20
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#define bfd_mach_sh_dsp     0x2d
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#define bfd_mach_sh2a       0x2a
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#define bfd_mach_sh2a_nofpu 0x2b
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#define bfd_mach_sh2e       0x2e
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#define bfd_mach_sh3        0x30
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#define bfd_mach_sh3_nommu  0x31
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#define bfd_mach_sh3_dsp    0x3d
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#define bfd_mach_sh3e       0x3e
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#define bfd_mach_sh4        0x40
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#define bfd_mach_sh4_nofpu  0x41
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#define bfd_mach_sh4_nommu_nofpu  0x42
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#define bfd_mach_sh4a       0x4a
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#define bfd_mach_sh4a_nofpu 0x4b
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#define bfd_mach_sh4al_dsp  0x4d
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#define bfd_mach_sh5        0x50
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  bfd_arch_alpha,      /* Dec Alpha */
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#define bfd_mach_alpha 1
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  bfd_arch_arm,        /* Advanced Risc Machines ARM */
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#define bfd_mach_arm_2         1
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#define bfd_mach_arm_2a                2
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#define bfd_mach_arm_3         3
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#define bfd_mach_arm_3M        4
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#define bfd_mach_arm_4                 5
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#define bfd_mach_arm_4T        6
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  bfd_arch_ns32k,      /* National Semiconductors ns32000 */
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  bfd_arch_w65,        /* WDC 65816 */
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  bfd_arch_tic30,      /* Texas Instruments TMS320C30 */
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  bfd_arch_v850,       /* NEC V850 */
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#define bfd_mach_v850          0
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  bfd_arch_arc,        /* Argonaut RISC Core */
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#define bfd_mach_arc_base 0
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  bfd_arch_m32r,       /* Mitsubishi M32R/D */
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#define bfd_mach_m32r          0  /* backwards compatibility */
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  bfd_arch_mn10200,    /* Matsushita MN10200 */
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  bfd_arch_mn10300,    /* Matsushita MN10300 */
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  bfd_arch_last
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  };
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#define bfd_mach_s390_31 31
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#define bfd_mach_s390_64 64
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typedef struct symbol_cache_entry
209
{
210
    const char *name;
211
    union
212
    {
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        PTR p;
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        bfd_vma i;
215
    } udata;
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} asymbol;
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typedef int (*fprintf_ftype) PARAMS((FILE*, const char*, ...));
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enum dis_insn_type {
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  dis_noninsn,                        /* Not a valid instruction */
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  dis_nonbranch,                /* Not a branch instruction */
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  dis_branch,                        /* Unconditional branch */
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  dis_condbranch,                /* Conditional branch */
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  dis_jsr,                        /* Jump to subroutine */
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  dis_condjsr,                        /* Conditional jump to subroutine */
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  dis_dref,                        /* Data reference instruction */
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  dis_dref2                        /* Two data references in instruction */
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};
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/* This struct is passed into the instruction decoding routine,
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   and is passed back out into each callback.  The various fields are used
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   for conveying information from your main routine into your callbacks,
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   for passing information into the instruction decoders (such as the
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   addresses of the callback functions), or for passing information
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   back from the instruction decoders to their callers.
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   It must be initialized before it is first passed; this can be done
239
   by hand, or using one of the initialization macros below.  */
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typedef struct disassemble_info {
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  fprintf_ftype fprintf_func;
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  FILE *stream;
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  PTR application_data;
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  /* Target description.  We could replace this with a pointer to the bfd,
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     but that would require one.  There currently isn't any such requirement
248
     so to avoid introducing one we record these explicitly.  */
249
  /* The bfd_flavour.  This can be bfd_target_unknown_flavour.  */
250
  enum bfd_flavour flavour;
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  /* The bfd_arch value.  */
252
  enum bfd_architecture arch;
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  /* The bfd_mach value.  */
254
  unsigned long mach;
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  /* Endianness (for bi-endian cpus).  Mono-endian cpus can ignore this.  */
256
  enum bfd_endian endian;
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258
  /* An array of pointers to symbols either at the location being disassembled
259
     or at the start of the function being disassembled.  The array is sorted
260
     so that the first symbol is intended to be the one used.  The others are
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     present for any misc. purposes.  This is not set reliably, but if it is
262
     not NULL, it is correct.  */
263
  asymbol **symbols;
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  /* Number of symbols in array.  */
265
  int num_symbols;
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267
  /* For use by the disassembler.
268
     The top 16 bits are reserved for public use (and are documented here).
269
     The bottom 16 bits are for the internal use of the disassembler.  */
270
  unsigned long flags;
271
#define INSN_HAS_RELOC        0x80000000
272
  PTR private_data;
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274
  /* Function used to get bytes to disassemble.  MEMADDR is the
275
     address of the stuff to be disassembled, MYADDR is the address to
276
     put the bytes in, and LENGTH is the number of bytes to read.
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     INFO is a pointer to this struct.
278
     Returns an errno value or 0 for success.  */
279
  int (*read_memory_func)
280
    PARAMS ((bfd_vma memaddr, bfd_byte *myaddr, int length,
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             struct disassemble_info *info));
282

    
283
  /* Function which should be called if we get an error that we can't
284
     recover from.  STATUS is the errno value from read_memory_func and
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     MEMADDR is the address that we were trying to read.  INFO is a
286
     pointer to this struct.  */
287
  void (*memory_error_func)
288
    PARAMS ((int status, bfd_vma memaddr, struct disassemble_info *info));
289

    
290
  /* Function called to print ADDR.  */
291
  void (*print_address_func)
292
    PARAMS ((bfd_vma addr, struct disassemble_info *info));
293

    
294
  /* Function called to determine if there is a symbol at the given ADDR.
295
     If there is, the function returns 1, otherwise it returns 0.
296
     This is used by ports which support an overlay manager where
297
     the overlay number is held in the top part of an address.  In
298
     some circumstances we want to include the overlay number in the
299
     address, (normally because there is a symbol associated with
300
     that address), but sometimes we want to mask out the overlay bits.  */
301
  int (* symbol_at_address_func)
302
    PARAMS ((bfd_vma addr, struct disassemble_info * info));
303

    
304
  /* These are for buffer_read_memory.  */
305
  bfd_byte *buffer;
306
  bfd_vma buffer_vma;
307
  int buffer_length;
308

    
309
  /* This variable may be set by the instruction decoder.  It suggests
310
      the number of bytes objdump should display on a single line.  If
311
      the instruction decoder sets this, it should always set it to
312
      the same value in order to get reasonable looking output.  */
313
  int bytes_per_line;
314

    
315
  /* the next two variables control the way objdump displays the raw data */
316
  /* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
317
  /* output will look like this:
318
     00:   00000000 00000000
319
     with the chunks displayed according to "display_endian". */
320
  int bytes_per_chunk;
321
  enum bfd_endian display_endian;
322

    
323
  /* Results from instruction decoders.  Not all decoders yet support
324
     this information.  This info is set each time an instruction is
325
     decoded, and is only valid for the last such instruction.
326

327
     To determine whether this decoder supports this information, set
328
     insn_info_valid to 0, decode an instruction, then check it.  */
329

    
330
  char insn_info_valid;                /* Branch info has been set. */
331
  char branch_delay_insns;        /* How many sequential insn's will run before
332
                                   a branch takes effect.  (0 = normal) */
333
  char data_size;                /* Size of data reference in insn, in bytes */
334
  enum dis_insn_type insn_type;        /* Type of instruction */
335
  bfd_vma target;                /* Target address of branch or dref, if known;
336
                                   zero if unknown.  */
337
  bfd_vma target2;                /* Second target address for dref2 */
338

    
339
  /* Command line options specific to the target disassembler.  */
340
  char * disassembler_options;
341

    
342
} disassemble_info;
343

    
344
 
345
/* Standard disassemblers.  Disassemble one instruction at the given
346
   target address.  Return number of bytes processed.  */
347
typedef int (*disassembler_ftype)
348
     PARAMS((bfd_vma, disassemble_info *));
349

    
350
extern int print_insn_big_mips                PARAMS ((bfd_vma, disassemble_info*));
351
extern int print_insn_little_mips        PARAMS ((bfd_vma, disassemble_info*));
352
extern int print_insn_i386                PARAMS ((bfd_vma, disassemble_info*));
353
extern int print_insn_m68k                PARAMS ((bfd_vma, disassemble_info*));
354
extern int print_insn_z8001                PARAMS ((bfd_vma, disassemble_info*));
355
extern int print_insn_z8002                PARAMS ((bfd_vma, disassemble_info*));
356
extern int print_insn_h8300                PARAMS ((bfd_vma, disassemble_info*));
357
extern int print_insn_h8300h                PARAMS ((bfd_vma, disassemble_info*));
358
extern int print_insn_h8300s                PARAMS ((bfd_vma, disassemble_info*));
359
extern int print_insn_h8500                PARAMS ((bfd_vma, disassemble_info*));
360
extern int print_insn_alpha                PARAMS ((bfd_vma, disassemble_info*));
361
extern disassembler_ftype arc_get_disassembler PARAMS ((int, int));
362
extern int print_insn_arm                PARAMS ((bfd_vma, disassemble_info*));
363
extern int print_insn_sparc                PARAMS ((bfd_vma, disassemble_info*));
364
extern int print_insn_big_a29k                PARAMS ((bfd_vma, disassemble_info*));
365
extern int print_insn_little_a29k        PARAMS ((bfd_vma, disassemble_info*));
366
extern int print_insn_i960                PARAMS ((bfd_vma, disassemble_info*));
367
extern int print_insn_sh                PARAMS ((bfd_vma, disassemble_info*));
368
extern int print_insn_shl                PARAMS ((bfd_vma, disassemble_info*));
369
extern int print_insn_hppa                PARAMS ((bfd_vma, disassemble_info*));
370
extern int print_insn_m32r                PARAMS ((bfd_vma, disassemble_info*));
371
extern int print_insn_m88k                PARAMS ((bfd_vma, disassemble_info*));
372
extern int print_insn_mn10200                PARAMS ((bfd_vma, disassemble_info*));
373
extern int print_insn_mn10300                PARAMS ((bfd_vma, disassemble_info*));
374
extern int print_insn_ns32k                PARAMS ((bfd_vma, disassemble_info*));
375
extern int print_insn_big_powerpc        PARAMS ((bfd_vma, disassemble_info*));
376
extern int print_insn_little_powerpc        PARAMS ((bfd_vma, disassemble_info*));
377
extern int print_insn_rs6000                PARAMS ((bfd_vma, disassemble_info*));
378
extern int print_insn_w65                PARAMS ((bfd_vma, disassemble_info*));
379
extern int print_insn_d10v                PARAMS ((bfd_vma, disassemble_info*));
380
extern int print_insn_v850                PARAMS ((bfd_vma, disassemble_info*));
381
extern int print_insn_tic30                PARAMS ((bfd_vma, disassemble_info*));
382
extern int print_insn_ppc                PARAMS ((bfd_vma, disassemble_info*));
383
extern int print_insn_alpha             PARAMS ((bfd_vma, disassemble_info*));
384
extern int print_insn_s390                PARAMS ((bfd_vma, disassemble_info*));
385

    
386
#if 0
387
/* Fetch the disassembler for a given BFD, if that support is available.  */
388
extern disassembler_ftype disassembler        PARAMS ((bfd *));
389
#endif
390

    
391
 
392
/* This block of definitions is for particular callers who read instructions
393
   into a buffer before calling the instruction decoder.  */
394

    
395
/* Here is a function which callers may wish to use for read_memory_func.
396
   It gets bytes from a buffer.  */
397
extern int buffer_read_memory
398
  PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
399

    
400
/* This function goes with buffer_read_memory.
401
   It prints a message using info->fprintf_func and info->stream.  */
402
extern void perror_memory PARAMS ((int, bfd_vma, struct disassemble_info *));
403

    
404

    
405
/* Just print the address in hex.  This is included for completeness even
406
   though both GDB and objdump provide their own (to print symbolic
407
   addresses).  */
408
extern void generic_print_address
409
  PARAMS ((bfd_vma, struct disassemble_info *));
410

    
411
/* Always true.  */
412
extern int generic_symbol_at_address
413
  PARAMS ((bfd_vma, struct disassemble_info *));
414

    
415
/* Macro to initialize a disassemble_info struct.  This should be called
416
   by all applications creating such a struct.  */
417
#define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
418
  (INFO).flavour = bfd_target_unknown_flavour, \
419
  (INFO).arch = bfd_arch_unknown, \
420
  (INFO).mach = 0, \
421
  (INFO).endian = BFD_ENDIAN_UNKNOWN, \
422
  INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
423

    
424
/* Call this macro to initialize only the internal variables for the
425
   disassembler.  Architecture dependent things such as byte order, or machine
426
   variant are not touched by this macro.  This makes things much easier for
427
   GDB which must initialize these things separately.  */
428

    
429
#define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
430
  (INFO).fprintf_func = (FPRINTF_FUNC), \
431
  (INFO).stream = (STREAM), \
432
  (INFO).symbols = NULL, \
433
  (INFO).num_symbols = 0, \
434
  (INFO).buffer = NULL, \
435
  (INFO).buffer_vma = 0, \
436
  (INFO).buffer_length = 0, \
437
  (INFO).read_memory_func = buffer_read_memory, \
438
  (INFO).memory_error_func = perror_memory, \
439
  (INFO).print_address_func = generic_print_address, \
440
  (INFO).symbol_at_address_func = generic_symbol_at_address, \
441
  (INFO).flags = 0, \
442
  (INFO).bytes_per_line = 0, \
443
  (INFO).bytes_per_chunk = 0, \
444
  (INFO).display_endian = BFD_ENDIAN_UNKNOWN, \
445
  (INFO).disassembler_options = NULL, \
446
  (INFO).insn_info_valid = 0
447

    
448
#define _(x) x
449
#define ATTRIBUTE_UNUSED __attribute__((unused))
450

    
451
/* from libbfd */
452

    
453
bfd_vma bfd_getl32 (const bfd_byte *addr);
454
bfd_vma bfd_getb32 (const bfd_byte *addr);
455
bfd_vma bfd_getl16 (const bfd_byte *addr);
456
bfd_vma bfd_getb16 (const bfd_byte *addr);
457
typedef enum bfd_boolean {false, true} boolean;
458
typedef boolean bfd_boolean;
459

    
460
#endif /* ! defined (DIS_ASM_H) */