Revision 5ff9d6a4 tcg/tcg-opc.h
| b/tcg/tcg-opc.h | ||
|---|---|---|
| 40 | 40 |
DEF2(macro_end, 0, 0, 2, 0) |
| 41 | 41 |
DEF2(macro_goto, 0, 0, 3, 0) |
| 42 | 42 |
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| 43 |
DEF2(discard, 1, 0, 0, 0) |
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| 44 |
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| 43 | 45 |
DEF2(set_label, 0, 0, 1, 0) |
| 44 |
DEF2(call, 0, 1, 2, 0) /* variable number of parameters */
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|
| 45 |
DEF2(jmp, 0, 1, 0, TCG_OPF_BB_END) |
|
| 46 |
DEF2(br, 0, 0, 1, TCG_OPF_BB_END) |
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| 46 |
DEF2(call, 0, 1, 2, TCG_OPF_SIDE_EFFECTS) /* variable number of parameters */
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| 47 |
DEF2(jmp, 0, 1, 0, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS)
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| 48 |
DEF2(br, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS)
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| 47 | 49 |
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| 48 | 50 |
DEF2(mov_i32, 1, 1, 0, 0) |
| 49 | 51 |
DEF2(movi_i32, 1, 0, 1, 0) |
| ... | ... | |
| 53 | 55 |
DEF2(ld16u_i32, 1, 1, 1, 0) |
| 54 | 56 |
DEF2(ld16s_i32, 1, 1, 1, 0) |
| 55 | 57 |
DEF2(ld_i32, 1, 1, 1, 0) |
| 56 |
DEF2(st8_i32, 0, 2, 1, 0)
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| 57 |
DEF2(st16_i32, 0, 2, 1, 0)
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| 58 |
DEF2(st_i32, 0, 2, 1, 0)
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| 58 |
DEF2(st8_i32, 0, 2, 1, TCG_OPF_SIDE_EFFECTS)
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| 59 |
DEF2(st16_i32, 0, 2, 1, TCG_OPF_SIDE_EFFECTS)
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| 60 |
DEF2(st_i32, 0, 2, 1, TCG_OPF_SIDE_EFFECTS)
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| 59 | 61 |
/* arith */ |
| 60 | 62 |
DEF2(add_i32, 1, 2, 0, 0) |
| 61 | 63 |
DEF2(sub_i32, 1, 2, 0, 0) |
| ... | ... | |
| 77 | 79 |
DEF2(shr_i32, 1, 2, 0, 0) |
| 78 | 80 |
DEF2(sar_i32, 1, 2, 0, 0) |
| 79 | 81 |
|
| 80 |
DEF2(brcond_i32, 0, 2, 2, TCG_OPF_BB_END) |
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| 82 |
DEF2(brcond_i32, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS)
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|
| 81 | 83 |
#if TCG_TARGET_REG_BITS == 32 |
| 82 | 84 |
DEF2(add2_i32, 2, 4, 0, 0) |
| 83 | 85 |
DEF2(sub2_i32, 2, 4, 0, 0) |
| 84 |
DEF2(brcond2_i32, 0, 4, 2, TCG_OPF_BB_END) |
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| 86 |
DEF2(brcond2_i32, 0, 4, 2, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS)
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| 85 | 87 |
DEF2(mulu2_i32, 2, 2, 0, 0) |
| 86 | 88 |
#endif |
| 87 | 89 |
#ifdef TCG_TARGET_HAS_ext8s_i32 |
| ... | ... | |
| 105 | 107 |
DEF2(ld32u_i64, 1, 1, 1, 0) |
| 106 | 108 |
DEF2(ld32s_i64, 1, 1, 1, 0) |
| 107 | 109 |
DEF2(ld_i64, 1, 1, 1, 0) |
| 108 |
DEF2(st8_i64, 0, 2, 1, 0)
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| 109 |
DEF2(st16_i64, 0, 2, 1, 0)
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| 110 |
DEF2(st32_i64, 0, 2, 1, 0)
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| 111 |
DEF2(st_i64, 0, 2, 1, 0)
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| 110 |
DEF2(st8_i64, 0, 2, 1, TCG_OPF_SIDE_EFFECTS)
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| 111 |
DEF2(st16_i64, 0, 2, 1, TCG_OPF_SIDE_EFFECTS)
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| 112 |
DEF2(st32_i64, 0, 2, 1, TCG_OPF_SIDE_EFFECTS)
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| 113 |
DEF2(st_i64, 0, 2, 1, TCG_OPF_SIDE_EFFECTS)
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| 112 | 114 |
/* arith */ |
| 113 | 115 |
DEF2(add_i64, 1, 2, 0, 0) |
| 114 | 116 |
DEF2(sub_i64, 1, 2, 0, 0) |
| ... | ... | |
| 130 | 132 |
DEF2(shr_i64, 1, 2, 0, 0) |
| 131 | 133 |
DEF2(sar_i64, 1, 2, 0, 0) |
| 132 | 134 |
|
| 133 |
DEF2(brcond_i64, 0, 2, 2, TCG_OPF_BB_END) |
|
| 135 |
DEF2(brcond_i64, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS)
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|
| 134 | 136 |
#ifdef TCG_TARGET_HAS_ext8s_i64 |
| 135 | 137 |
DEF2(ext8s_i64, 1, 1, 0, 0) |
| 136 | 138 |
#endif |
| ... | ... | |
| 146 | 148 |
#endif |
| 147 | 149 |
|
| 148 | 150 |
/* QEMU specific */ |
| 149 |
DEF2(exit_tb, 0, 0, 1, TCG_OPF_BB_END) |
|
| 150 |
DEF2(goto_tb, 0, 0, 1, TCG_OPF_BB_END) |
|
| 151 |
DEF2(exit_tb, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS)
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| 152 |
DEF2(goto_tb, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS)
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| 151 | 153 |
/* Note: even if TARGET_LONG_BITS is not defined, the INDEX_op |
| 152 | 154 |
constants must be defined */ |
| 153 | 155 |
#if TCG_TARGET_REG_BITS == 32 |
| 154 | 156 |
#if TARGET_LONG_BITS == 32 |
| 155 |
DEF2(qemu_ld8u, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 157 |
DEF2(qemu_ld8u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 156 | 158 |
#else |
| 157 |
DEF2(qemu_ld8u, 1, 2, 1, TCG_OPF_CALL_CLOBBER) |
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| 159 |
DEF2(qemu_ld8u, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 158 | 160 |
#endif |
| 159 | 161 |
#if TARGET_LONG_BITS == 32 |
| 160 |
DEF2(qemu_ld8s, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 162 |
DEF2(qemu_ld8s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 161 | 163 |
#else |
| 162 |
DEF2(qemu_ld8s, 1, 2, 1, TCG_OPF_CALL_CLOBBER) |
|
| 164 |
DEF2(qemu_ld8s, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 163 | 165 |
#endif |
| 164 | 166 |
#if TARGET_LONG_BITS == 32 |
| 165 |
DEF2(qemu_ld16u, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 167 |
DEF2(qemu_ld16u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 166 | 168 |
#else |
| 167 |
DEF2(qemu_ld16u, 1, 2, 1, TCG_OPF_CALL_CLOBBER) |
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| 169 |
DEF2(qemu_ld16u, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 168 | 170 |
#endif |
| 169 | 171 |
#if TARGET_LONG_BITS == 32 |
| 170 |
DEF2(qemu_ld16s, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 172 |
DEF2(qemu_ld16s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 171 | 173 |
#else |
| 172 |
DEF2(qemu_ld16s, 1, 2, 1, TCG_OPF_CALL_CLOBBER) |
|
| 174 |
DEF2(qemu_ld16s, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 173 | 175 |
#endif |
| 174 | 176 |
#if TARGET_LONG_BITS == 32 |
| 175 |
DEF2(qemu_ld32u, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 177 |
DEF2(qemu_ld32u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 176 | 178 |
#else |
| 177 |
DEF2(qemu_ld32u, 1, 2, 1, TCG_OPF_CALL_CLOBBER) |
|
| 179 |
DEF2(qemu_ld32u, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 178 | 180 |
#endif |
| 179 | 181 |
#if TARGET_LONG_BITS == 32 |
| 180 |
DEF2(qemu_ld32s, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 182 |
DEF2(qemu_ld32s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 181 | 183 |
#else |
| 182 |
DEF2(qemu_ld32s, 1, 2, 1, TCG_OPF_CALL_CLOBBER) |
|
| 184 |
DEF2(qemu_ld32s, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 183 | 185 |
#endif |
| 184 | 186 |
#if TARGET_LONG_BITS == 32 |
| 185 |
DEF2(qemu_ld64, 2, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 187 |
DEF2(qemu_ld64, 2, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 186 | 188 |
#else |
| 187 |
DEF2(qemu_ld64, 2, 2, 1, TCG_OPF_CALL_CLOBBER) |
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| 189 |
DEF2(qemu_ld64, 2, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 188 | 190 |
#endif |
| 189 | 191 |
|
| 190 | 192 |
#if TARGET_LONG_BITS == 32 |
| 191 |
DEF2(qemu_st8, 0, 2, 1, TCG_OPF_CALL_CLOBBER) |
|
| 193 |
DEF2(qemu_st8, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 192 | 194 |
#else |
| 193 |
DEF2(qemu_st8, 0, 3, 1, TCG_OPF_CALL_CLOBBER) |
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| 195 |
DEF2(qemu_st8, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 194 | 196 |
#endif |
| 195 | 197 |
#if TARGET_LONG_BITS == 32 |
| 196 |
DEF2(qemu_st16, 0, 2, 1, TCG_OPF_CALL_CLOBBER) |
|
| 198 |
DEF2(qemu_st16, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 197 | 199 |
#else |
| 198 |
DEF2(qemu_st16, 0, 3, 1, TCG_OPF_CALL_CLOBBER) |
|
| 200 |
DEF2(qemu_st16, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 199 | 201 |
#endif |
| 200 | 202 |
#if TARGET_LONG_BITS == 32 |
| 201 |
DEF2(qemu_st32, 0, 2, 1, TCG_OPF_CALL_CLOBBER) |
|
| 203 |
DEF2(qemu_st32, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 202 | 204 |
#else |
| 203 |
DEF2(qemu_st32, 0, 3, 1, TCG_OPF_CALL_CLOBBER) |
|
| 205 |
DEF2(qemu_st32, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 204 | 206 |
#endif |
| 205 | 207 |
#if TARGET_LONG_BITS == 32 |
| 206 |
DEF2(qemu_st64, 0, 3, 1, TCG_OPF_CALL_CLOBBER) |
|
| 208 |
DEF2(qemu_st64, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 207 | 209 |
#else |
| 208 |
DEF2(qemu_st64, 0, 4, 1, TCG_OPF_CALL_CLOBBER) |
|
| 210 |
DEF2(qemu_st64, 0, 4, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 209 | 211 |
#endif |
| 210 | 212 |
|
| 211 | 213 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
| 212 | 214 |
|
| 213 |
DEF2(qemu_ld8u, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 214 |
DEF2(qemu_ld8s, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 215 |
DEF2(qemu_ld16u, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 216 |
DEF2(qemu_ld16s, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 217 |
DEF2(qemu_ld32u, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 218 |
DEF2(qemu_ld32s, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 219 |
DEF2(qemu_ld64, 1, 1, 1, TCG_OPF_CALL_CLOBBER) |
|
| 215 |
DEF2(qemu_ld8u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 216 |
DEF2(qemu_ld8s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 217 |
DEF2(qemu_ld16u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 218 |
DEF2(qemu_ld16s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 219 |
DEF2(qemu_ld32u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 220 |
DEF2(qemu_ld32s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 221 |
DEF2(qemu_ld64, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 220 | 222 |
|
| 221 |
DEF2(qemu_st8, 0, 2, 1, TCG_OPF_CALL_CLOBBER) |
|
| 222 |
DEF2(qemu_st16, 0, 2, 1, TCG_OPF_CALL_CLOBBER) |
|
| 223 |
DEF2(qemu_st32, 0, 2, 1, TCG_OPF_CALL_CLOBBER) |
|
| 224 |
DEF2(qemu_st64, 0, 2, 1, TCG_OPF_CALL_CLOBBER) |
|
| 223 |
DEF2(qemu_st8, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 224 |
DEF2(qemu_st16, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 225 |
DEF2(qemu_st32, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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| 226 |
DEF2(qemu_st64, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS)
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|
| 225 | 227 |
|
| 226 | 228 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
| 227 | 229 |
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