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# Date Author Comment
604457d7 03/29/2009 01:27 am aurel32

tcg/README: fix description of bswap32_i32/i64

Thanks to Stuart Brady for the notice.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6920 c046a42c-6fe2-441c-8c8c-71466251a162

86dbdd40 03/13/2009 11:35 am aurel32

tcg/x86_64: add bswap16_i{32,64} and bswap32_i64 ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6838 c046a42c-6fe2-441c-8c8c-71466251a162

5d40cd63 03/13/2009 11:35 am aurel32

tcg/x86: add bswap16_i32 ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6837 c046a42c-6fe2-441c-8c8c-71466251a162

4ad4ce16 03/13/2009 11:35 am aurel32

tcg: update README wrt recent bswap changes

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6834 c046a42c-6fe2-441c-8c8c-71466251a162

911d79ba 03/13/2009 11:35 am aurel32

tcg: add _tl aliases to bswap16/32/64 TCG ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6833 c046a42c-6fe2-441c-8c8c-71466251a162

9a5c57fd 03/13/2009 11:35 am aurel32

tcg: add bswap16_i64 and bswap32_i64 TCG ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6832 c046a42c-6fe2-441c-8c8c-71466251a162

dfa1a3f1 03/13/2009 11:35 am aurel32

tcg: optimize tcg_gen_bswap16_i32

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6831 c046a42c-6fe2-441c-8c8c-71466251a162

84aafb06 03/13/2009 11:34 am aurel32

tcg: allow bswap16_i32 to be implemented by TCG backends

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6830 c046a42c-6fe2-441c-8c8c-71466251a162

66896cb8 03/13/2009 11:34 am aurel32

tcg: rename bswap_i32/i64 functions

Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162

0dd0dd55 03/11/2009 01:00 pm aurel32

tcg: move {not,neg}_i{32,64} definitions at the right place

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6811 c046a42c-6fe2-441c-8c8c-71466251a162

e5105083 03/11/2009 04:57 am aurel32

tcg: fix commit r6805

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6810 c046a42c-6fe2-441c-8c8c-71466251a162

419bafa5 03/10/2009 11:43 pm aurel32

tcg-arm: fix qemu_ld64

Emulating fldl on arm doesn't seem to work too well. It's the way
qemu_ld64 is translated to arm instructions.

tcg_out_ld32_12(s, COND_AL, data_reg, addr_reg, 0);
tcg_out_ld32_12(s, COND_AL, data_reg2, addr_reg, 4);...
506bfcbb 03/10/2009 09:37 pm aurel32

tcg: update TODO

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6807 c046a42c-6fe2-441c-8c8c-71466251a162

9619376c 03/10/2009 09:37 pm aurel32

tcg/x86: add not/neg/extu/bswap/rot i32 ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6806 c046a42c-6fe2-441c-8c8c-71466251a162

7fc81051 03/10/2009 09:37 pm aurel32

tcg: optimize logical operations

Simplify nand/nor/eqv and move their optimizations to and/or/xor

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6805 c046a42c-6fe2-441c-8c8c-71466251a162

43e860ef 03/10/2009 12:29 pm aurel32

Fix tcg after commit 6800

The introduction of TCGV_EQUAL and not op is slightly broken.
The definition of DEBUG_TCGV shows that.

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6802 c046a42c-6fe2-441c-8c8c-71466251a162

fe75bcf7 03/10/2009 10:57 am aurel32

tcg: use TCGV_EQUAL_I{32,64}

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6800 c046a42c-6fe2-441c-8c8c-71466251a162

44e6acb0 03/10/2009 10:56 am aurel32

tcg: define TCGV_EQUAL_I{32,64}

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6799 c046a42c-6fe2-441c-8c8c-71466251a162

c29d0de4 03/10/2009 12:35 am aurel32

tcg: optimize nor(X, Y, Y), used on PPC for not(X, Y)

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6798 c046a42c-6fe2-441c-8c8c-71466251a162

d2604285 03/10/2009 12:35 am aurel32

Implement TCG not ops for x86-64

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6797 c046a42c-6fe2-441c-8c8c-71466251a162

f31e9370 03/09/2009 11:58 pm aurel32

tcg: don't define TCG rotation ops if they are not supported

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6796 c046a42c-6fe2-441c-8c8c-71466251a162

d42f183c 03/09/2009 08:50 pm aurel32

Implement TCG rotation ops for x86-64

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6795 c046a42c-6fe2-441c-8c8c-71466251a162

e63d7abd 03/08/2009 04:45 pm blueswir1

Prune unused TCG_AREGs

Remove definitions for TCG_AREGs corresponding to AREG definitions
removed in r6778.

Signed-off-by: Stuart Brady <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6779 c046a42c-6fe2-441c-8c8c-71466251a162

9e622b15 03/07/2009 05:46 pm blueswir1

Sparse fixes: truncation by cast

Fix Sparse warnings about constant truncation caused by cast

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6737 c046a42c-6fe2-441c-8c8c-71466251a162

9c22bc63 02/11/2009 09:47 pm blueswir1

TCG: remove obsolete old_op_count profiler field

Since we don't generate any "old op" anymore, the old_op_count
is unneeded.

Signed-off-by: Laurent Desnogues <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6614 c046a42c-6fe2-441c-8c8c-71466251a162

095271d4 02/11/2009 08:54 pm malc

Add missing r24..r26 to callee save registers

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6613 c046a42c-6fe2-441c-8c8c-71466251a162

eb2eb1dc 02/11/2009 08:51 pm malc

Add missing r24..r26 to calle save registers

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6612 c046a42c-6fe2-441c-8c8c-71466251a162

2edd089f 02/10/2009 09:00 pm blueswir1

Add "static"

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6588 c046a42c-6fe2-441c-8c8c-71466251a162

a747723b 02/09/2009 10:43 pm aurel32

Fix DEBUG_TCGV compile error.

Don't call TCGV_LOW on arg2. This section of code falls under

Signed-off-by: Nathan Froyd <>
Acked-by: Laurent Desnogues <>
Signed-off-by: Aurelien Jarno <>...

5db3ee79 01/26/2009 08:21 pm malc

R13 is reserved for small data area pointer by SVR4 PPC ABI

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6450 c046a42c-6fe2-441c-8c8c-71466251a162

8fec2b8c 01/16/2009 12:36 am aliguori

global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)

These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <>
Signed-off-by: Anthony Liguori <>...

93fcfe39 01/16/2009 12:34 am aliguori

Convert references to logfile/loglevel to use qemu_log*() macros

This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <>
Signed-off-by: Anthony Liguori <>...

e58ffeb3 01/14/2009 08:39 pm malc

Remove all traces of powerpc

According to $GCC/gcc/config/rs6000/rs6000-c.c _ARCH_PPC is the
ubiquitous define which should be used to test whether gcc targets
PowerPC, on 64bit platforms _ARCH_PPC64 will be also defined.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6301 c046a42c-6fe2-441c-8c8c-71466251a162

5d04f23b 01/03/2009 02:36 pm aurel32

tcg: remove tcg_global_reg2_new_hack()

This patch removes the unused tcg_global_reg2_new_hack() function, which
was added in r4438 to work around a register shortage problem regarding
dyngen. The only ever user of this function was removed in r4577.

Signed-off-by: Stuart Brady <>...

f53bca18 01/03/2009 02:35 pm aurel32

TCG: Fix documentation of qemu_ld/st ops

The functions defined in tcg/tcg-op.h have no _i32 or _i64 suffix,
qemu_ld64 and qemu_st64 were missing from the list, and there are
no 'plain' qemu_ld/qemu_st ops.

Signed-off-by: Stuart Brady <>...

df9247b2 01/01/2009 04:09 pm aurel32

tcg_temp_local_new should take no parameter

This patch removes useless type information in some calls to
tcg_temp_local_new. It also removes the parameter from the
macro declaration; if a target has to use a specific non-default
size then it should use tcg_temp_local_new_{i32,i64}....

b1503cda 12/22/2008 10:33 pm malc

Use the ARRAY_SIZE() macro where appropriate.

Change from v1:
Avoid changing the existing coding style in certain files.

Signed-off-by: Stuart Brady <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162

3e9a474e 12/14/2008 07:29 pm aurel32

tcg: kill two warnings

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6029 c046a42c-6fe2-441c-8c8c-71466251a162

9db3ba4d 12/13/2008 08:57 pm aurel32

TCG x86/x86-64: use move with zero-extend for loads/stores

Starting with version 4.3, gcc returns the result of a function in
rax/eax/ax/al instead of rax/eax, depending of the return type. As
a consequence we should use a zero extend moe in TCG loads/stores....

1d6198c3 12/13/2008 11:32 am blueswir1

Remove unnecessary trailing newlines

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162

7a3a5141 12/13/2008 10:16 am blueswir1

Fix TARGET_LONG_BITS warning in TCG

Looking at tcg/tcg.c:828, the bug that the warning indicated would show up as
incorrect PC shown in log, only on 32 bit big endian host emulating a 64 bit
target, -d op flag enabled. Now that dyngen is gone, the patch can be applied....

902b3d5c 12/10/2008 09:18 pm malc

Introduce and use cache-utils.[ch]

Thanks to Segher Boessenkool and Holis Blanchard.

AIX and Darwin cache inquiry:
http://gcc.gnu.org/ml/gcc-patches/2007-08/msg00388.html

Auxiliary vectors:
http://manugarg.googlepages.com/aboutelfauxiliaryvectors

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5973 c046a42c-6fe2-441c-8c8c-71466251a162

aef3a282 12/08/2008 01:35 am balrog

Fix 64-bit targets compilation on ARM host.

Only fix compilation, probably doesn't run.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5947 c046a42c-6fe2-441c-8c8c-71466251a162

54604f74 12/07/2008 10:35 pm aurel32

Some cleanups after dyngen removal

1. hostregs_helper.h: fix comment
2. translate-all.c: rename dyngen_code(_search_pc) to
tcg_gen_code(_search_pc)
3. tcg.c:
- rename dyngen_table_op_count to tcg_table_op_count
- no need to generate a log of dyngen ops generated...

49516bc0 12/07/2008 08:15 pm aurel32

Some cleanups after dyngen removal

this patch removes some now unused things after dyngen removal.

1. dyngen-exec.h: op_param, op _jmp and some associated macros
are now unused;
2. Makefile.target: tcg-dyngen is not needed anymore
2. tcg/tcg-op.h, tcg/tcg-opc.h: gen-op.h is dead...

a810a2de 12/07/2008 07:16 pm blueswir1

Some fixes for TCG debugging

This fixes a few things after Paul's improvements for TCG debugging:

- change TCGv_i64 field name to something different from
TCGv_i32
- fix things in tcg that the above change made visible.

Signed-off-by: Laurent Desnogues <>...

86e840ee 12/07/2008 05:21 pm aurel32

Remove a few dyngen and dyngen related code

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5914 c046a42c-6fe2-441c-8c8c-71466251a162

0c9c3a9e 12/01/2008 01:57 pm balrog

arm: Don't potentially overwrite input registers in add2, sub2.

According to malc TCG will often genereate an add2/sub2/mul2 with low
half of the output in the same register as high half of one of the
inputs, so account for that.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5847 c046a42c-6fe2-441c-8c8c-71466251a162

fe33867b 12/01/2008 04:17 am balrog

Don't rely on ARM tcg_out_goto() generating just a single insn.

Otherwise when tb_exit generates a jump beyond the pc-relative range,
tcg_out_goto() spans two/three instructions and we load the tb return
value from a wrong address. This is #ifdefed out currently because...

3233f0d4 12/01/2008 04:02 am balrog

Use libgcc __clear_cache to clean icache, when available.

Calling the clear cache syscall directly generates an illegal instruction
on some (armv4) kernels.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5843 c046a42c-6fe2-441c-8c8c-71466251a162

ebd486d5 11/29/2008 09:55 pm malc

Fix alignment of 64bit args

Unbreaks sparc and mips64el. (Reported by Thiemo Seufer)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5815 c046a42c-6fe2-441c-8c8c-71466251a162

b29fe3ed 11/18/2008 03:42 am malc

Preliminary AIX support

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5732 c046a42c-6fe2-441c-8c8c-71466251a162

a7812ae4 11/17/2008 04:43 pm pbrook

TCG variable type checking.

Signed-off-by: Paul Brook <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162

2946898b 11/12/2008 10:36 pm malc

Rename misnamed BACK_CHAIN_OFFSET to LR_OFFSET

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5711 c046a42c-6fe2-441c-8c8c-71466251a162

8421d9e5 11/12/2008 10:36 pm malc

Avoid compiler warning

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5710 c046a42c-6fe2-441c-8c8c-71466251a162

828808f5 11/11/2008 05:04 am malc

Fix alignment problem with some 64bit load/store instructions

LD/STD/LWA require displacement to be multiple of 4, provide
tcg_out_ldsta which checks the supplied displacement and falls
back on indexed variant when the check fails. All uses of
LD/STD/LWA outside of tcg_out_ldst appear to be safe....

0c5f3c8d 11/04/2008 03:17 pm pbrook

Mention output overlaps.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5619 c046a42c-6fe2-441c-8c8c-71466251a162

de3526b2 11/03/2008 03:30 pm pbrook

Fix rotri_i64 typo.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5609 c046a42c-6fe2-441c-8c8c-71466251a162

15824571 11/03/2008 09:08 am aurel32

tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructions

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5607 c046a42c-6fe2-441c-8c8c-71466251a162

f02bb954 11/03/2008 09:08 am aurel32

tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targets

Use the same order as the _i32 version (pure code move). Suggested by
Laurent Laurent Desnogues.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5606 c046a42c-6fe2-441c-8c8c-71466251a162

10460c8a 11/02/2008 03:26 pm pbrook

64-bit target subfi fix.

Signed-off-by: Paul Brook <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5602 c046a42c-6fe2-441c-8c8c-71466251a162

0045734a 11/02/2008 10:23 am aurel32

tcg-ops.h: add a subfi wrapper

Add a subfi (subtract from immediate) wrapper, useful for the PPC target.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5599 c046a42c-6fe2-441c-8c8c-71466251a162

6359706f 11/02/2008 10:22 am aurel32

tcg-ops.h: _i64 TCG immediate instructions cleanup

Move addi_i64, muli_i64 and subi_i64 out of #if TCG_TARGET_REG_BITS
as both implementations are strictly identical. Use the same
optimisation (ie when imm == 0) for addi_i64 and subi_64 than the
32-bit version....

b1d8e52e 10/26/2008 03:43 pm blueswir1

Fix undeclared symbol warnings from sparse

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162

bdffd4a9 10/21/2008 02:30 pm aurel32

TCG: add tcg_const_local_tl()

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5504 c046a42c-6fe2-441c-8c8c-71466251a162

f24cb33e 10/21/2008 02:28 pm aurel32

TCG: add logical operations found on alpha and powerpc processors

- andc_i32/i64 t0, t1, t2
- eqv_i32/i64 t0, t1, t2
- nand_i32/i64 t0, t1, t2
- nor_i32/i64 t0, t1, t2
- orc_i32/i64 t0, t1, t2

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5501 c046a42c-6fe2-441c-8c8c-71466251a162

d4a9eb1f 10/05/2008 12:59 pm blueswir1

Add some missing static and const qualifiers, reg_names only used if NDEBUG set

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5421 c046a42c-6fe2-441c-8c8c-71466251a162

3ee1b855 10/02/2008 11:02 pm malc

Optimize 64 bit bswap

Use rldimi instead of rldicr/or pair, saves us one instruction.
Suggested by Hollis Blanchard.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5404 c046a42c-6fe2-441c-8c8c-71466251a162

88422e2e 09/24/2008 01:31 am pbrook

Fix tcg_gen_concat32_i64 on 64-bit hosts.

Signed-off-by: Paul Brook <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5306 c046a42c-6fe2-441c-8c8c-71466251a162

f8edcbaa 09/22/2008 04:08 am malc

Avoid clobbering input register in qemu_ld64+bswap+useronly case

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5287 c046a42c-6fe2-441c-8c8c-71466251a162

945ca823 09/21/2008 09:32 pm blueswir1

Add concat32_i64 and concat_tl_i64 ops

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5282 c046a42c-6fe2-441c-8c8c-71466251a162

36aa55dc 09/21/2008 04:48 pm pbrook

Add concat_i32_i64 op.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162

f48f3ede 09/14/2008 10:45 am blueswir1

Display TCGCond name in tcg dumper (original patch by Tristan Gingold)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5208 c046a42c-6fe2-441c-8c8c-71466251a162

9d0efc88 09/13/2008 11:07 pm blueswir1

Use 64 bit loads for tlb addend only if addend size is 64 bits

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5203 c046a42c-6fe2-441c-8c8c-71466251a162

baf8cc52 09/13/2008 11:05 pm blueswir1

Fix stack alignment on Sparc32 host

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5202 c046a42c-6fe2-441c-8c8c-71466251a162

733fef0e 09/07/2008 09:07 pm pbrook

TCG: Use x86-64 zero extension instructions.

Signed-off-by: Paul Brook <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5180 c046a42c-6fe2-441c-8c8c-71466251a162

b6d17150 09/07/2008 08:45 pm pbrook

Implement TCG sign extension ops for x86-64.

Signed-off-by: Paul Brook <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5179 c046a42c-6fe2-441c-8c8c-71466251a162

00dbbb03 09/05/2008 05:22 pm aurel32

Revert "TCG: enable debug"

This reverts commit 5166, commited by error.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5169 c046a42c-6fe2-441c-8c8c-71466251a162

b24a39fa 09/05/2008 05:19 pm aurel32

TCG: enable debug

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5166 c046a42c-6fe2-441c-8c8c-71466251a162

79383c9c 08/30/2008 12:51 pm blueswir1

Fix some warnings that would be generated by gcc -Wredundant-decls

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162

70fa887c 08/21/2008 04:14 am malc

Relax qemu_ld/st constraints for !SOFTMMU case

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5038 c046a42c-6fe2-441c-8c8c-71466251a162

735ee40d 08/21/2008 01:39 am malc

Relax qemu_ld/st constraints for !SOFTMMU case

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5034 c046a42c-6fe2-441c-8c8c-71466251a162

109719ec 08/21/2008 01:39 am malc

Avoid clobbering input/aliased registers in !SOFTMMU+64bit+bswap case

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5033 c046a42c-6fe2-441c-8c8c-71466251a162

0b7c1d89 08/21/2008 01:39 am malc

Clear the upper 32 bits of addr_reg in TARGET_LONG_BITS == 32 case

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5032 c046a42c-6fe2-441c-8c8c-71466251a162

a2a546b3 08/21/2008 01:39 am malc

Move tcg_out_tlb_read into #ifdef CONFIG_SOFTMMU block to avoid compiler warning

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5031 c046a42c-6fe2-441c-8c8c-71466251a162

8fcd3692 08/17/2008 11:26 pm blueswir1

Fix some warnings that would be generated by gcc -Wmissing-prototypes

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5022 c046a42c-6fe2-441c-8c8c-71466251a162

6f41b777 08/17/2008 11:14 pm blueswir1

Fix 64 bit constant generation

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5020 c046a42c-6fe2-441c-8c8c-71466251a162

90cbed46 08/17/2008 07:13 pm blueswir1

Fix 32 bit address overflow

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5019 c046a42c-6fe2-441c-8c8c-71466251a162

bffe1431 08/17/2008 05:34 pm blueswir1

Restore AREG0 after calls

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5018 c046a42c-6fe2-441c-8c8c-71466251a162

56fc64df 08/16/2008 10:54 pm blueswir1

Sparc code generator update (fix qemu_ld & qemu_st)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5014 c046a42c-6fe2-441c-8c8c-71466251a162

53c37487 08/15/2008 09:14 pm blueswir1

Sparc code generator update

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5009 c046a42c-6fe2-441c-8c8c-71466251a162

bf6bca52 08/03/2008 10:04 pm malc

Account for MacOS X ABI reserved space in linkage area (Andreas Faerber)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4985 c046a42c-6fe2-441c-8c8c-71466251a162

f9bf2987 08/03/2008 10:04 pm malc

Preliminary MacOS X on PPC32 support

Big thanks to BlueSwirl for Sparc failure analysis.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4984 c046a42c-6fe2-441c-8c8c-71466251a162

52781543 07/29/2008 11:08 pm malc

On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64

Avoids nasty warnings about flush_icache_range from gcc4 and inability
to compile [cpu-]exec.c with gcc3 and -O, also the function is much
too large to be candidate for inlining anyway.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4974 c046a42c-6fe2-441c-8c8c-71466251a162

fe6f943f 07/29/2008 02:46 am malc

Immediate versions of some operations

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4962 c046a42c-6fe2-441c-8c8c-71466251a162

000a2d86 07/29/2008 02:46 am malc

Do not try handle "special" arguments of and/or/xor/shl/shr, upper level does it

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4961 c046a42c-6fe2-441c-8c8c-71466251a162

e924bbec 07/28/2008 10:42 pm malc

Set the L field of CMP[L][I] when dealing with 64 bit quantities

This (along with previous 2 commits) makes X86_64 work on ppc64 too.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4960 c046a42c-6fe2-441c-8c8c-71466251a162

880e52b8 07/28/2008 10:42 pm malc

Fix preprocessor guard condition

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4959 c046a42c-6fe2-441c-8c8c-71466251a162

95153fde 07/28/2008 10:42 pm malc

Remove leftover from previous way to load 64 bit constants

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4958 c046a42c-6fe2-441c-8c8c-71466251a162

4a40e231 07/27/2008 02:09 pm malc

Special-case some paths inside tcg_out_tlb_read

a. Use 32bit arithmetics in TARGET_LONG_BITS 32 case
b. Optimize byte access case in TARGET_LONG_BITS 64 case

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4955 c046a42c-6fe2-441c-8c8c-71466251a162