Revision 60c9af07 target-mips/cpu.h

b/target-mips/cpu.h
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struct CPUMIPSTLBContext {
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    uint32_t nb_tlb;
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    uint32_t tlb_in_use;
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    int (*map_address) (struct CPUMIPSState *env, target_ulong *physical, int *prot, target_ulong address, int rw, int access_type);
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    int (*map_address) (struct CPUMIPSState *env, target_phys_addr_t *physical, int *prot, target_ulong address, int rw, int access_type);
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    void (*helper_tlbwi) (void);
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    void (*helper_tlbwr) (void);
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    void (*helper_tlbp) (void);
......
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    struct QEMUTimer *timer; /* Internal timer */
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};
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int no_mmu_map_address (CPUMIPSState *env, target_ulong *physical, int *prot,


  		





  
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int no_mmu_map_address (CPUMIPSState *env, target_phys_addr_t *physical, int *prot,


  		





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                        target_ulong address, int rw, int access_type);


  		





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int fixed_mmu_map_address (CPUMIPSState *env, target_ulong *physical, int *prot,


  		





  
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int fixed_mmu_map_address (CPUMIPSState *env, target_phys_addr_t *physical, int *prot,


  		





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                           target_ulong address, int rw, int access_type);


  		





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int r4k_map_address (CPUMIPSState *env, target_ulong *physical, int *prot,


  		





  
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int r4k_map_address (CPUMIPSState *env, target_phys_addr_t *physical, int *prot,


  		





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                     target_ulong address, int rw, int access_type);


  		





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void r4k_helper_tlbwi (void);


  		





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void r4k_helper_tlbwr (void);


  		












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