Revision 61382a50 exec.c

b/exec.c
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        prot = 0;
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        for(addr = host_start; addr < host_end; addr += TARGET_PAGE_SIZE)
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            prot |= page_get_flags(addr);
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#if !defined(CONFIG_SOFTMMU)
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        mprotect((void *)host_start, host_page_size, 
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                 (prot & PAGE_BITS) & ~PAGE_WRITE);
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#endif
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#if !defined(CONFIG_USER_ONLY)
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        /* suppress soft TLB */
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        /* XXX: must flush on all processor with same address space */
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        tlb_flush_page_write(cpu_single_env, host_start);
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#endif
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#ifdef DEBUG_TB_INVALIDATE
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        printf("protecting code page: 0x%08lx\n", 
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               host_start);
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#endif
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        p->flags &= ~PAGE_WRITE;
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#ifdef DEBUG_TB_CHECK
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        tb_page_check();
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#endif
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    }
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}
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......
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    if (page_index2 != page_index1) {
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        tb_alloc_page(tb, page_index2);
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    }
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#ifdef DEBUG_TB_CHECK
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    tb_page_check();
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#endif
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    tb->jmp_first = (TranslationBlock *)((long)tb | 2);
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    tb->jmp_next[0] = NULL;
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    tb->jmp_next[1] = NULL;
......
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    /* if the page was really writable, then we change its
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       protection back to writable */
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    if (prot & PAGE_WRITE_ORG) {
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        mprotect((void *)host_start, host_page_size, 
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                 (prot & PAGE_BITS) | PAGE_WRITE);
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        pindex = (address - host_start) >> TARGET_PAGE_BITS;
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        p1[pindex].flags |= PAGE_WRITE;
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        /* and since the content will be modified, we must invalidate
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           the corresponding translated code. */
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        tb_invalidate_page(address);
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        if (!(p1[pindex].flags & PAGE_WRITE)) {
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#if !defined(CONFIG_SOFTMMU)
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            mprotect((void *)host_start, host_page_size, 
531
                     (prot & PAGE_BITS) | PAGE_WRITE);
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#endif
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            p1[pindex].flags |= PAGE_WRITE;
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            /* and since the content will be modified, we must invalidate
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               the corresponding translated code. */
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            tb_invalidate_page(address);
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#ifdef DEBUG_TB_CHECK
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        tb_invalidate_check(address);
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            tb_invalidate_check(address);
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#endif
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        return 1;
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    } else {
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        return 0;
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            return 1;
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        }
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    }
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    return 0;
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}
535 545

  
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/* call this function when system calls directly modify a memory area */
......
734 744
/* unmap all maped pages and flush all associated code */
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void page_unmap(void)
736 746
{
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    PageDesc *p, *pmap;
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    unsigned long addr;
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    int i, j, ret, j1;
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    PageDesc *pmap;
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    int i;
740 749

  
741 750
    for(i = 0; i < L1_SIZE; i++) {
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        pmap = l1_map[i];
743 752
        if (pmap) {
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#if !defined(CONFIG_SOFTMMU)
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            PageDesc *p;
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            unsigned long addr;
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            int j, ret, j1;
757
            
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            p = pmap;
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            for(j = 0;j < L2_SIZE;) {
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                if (p->flags & PAGE_VALID) {
......
763 777
                    j++;
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                }
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            }
780
#endif
766 781
            free(pmap);
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            l1_map[i] = NULL;
768 783
        }
......
773 788

  
774 789
void tlb_flush(CPUState *env)
775 790
{
776
#if defined(TARGET_I386)
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#if !defined(CONFIG_USER_ONLY)
777 792
    int i;
778 793
    for(i = 0; i < CPU_TLB_SIZE; i++) {
779 794
        env->tlb_read[0][i].address = -1;
......
784 799
#endif
785 800
}
786 801

  
802
static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, uint32_t addr)
803
{
804
    if (addr == (tlb_entry->address & 
805
                 (TARGET_PAGE_MASK | TLB_INVALID_MASK)))
806
        tlb_entry->address = -1;
807
}
808

  
787 809
void tlb_flush_page(CPUState *env, uint32_t addr)
788 810
{
789
#if defined(TARGET_I386)
811
#if !defined(CONFIG_USER_ONLY)
812
    int i;
813

  
814
    addr &= TARGET_PAGE_MASK;
815
    i = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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    tlb_flush_entry(&env->tlb_read[0][i], addr);
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    tlb_flush_entry(&env->tlb_write[0][i], addr);
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    tlb_flush_entry(&env->tlb_read[1][i], addr);
819
    tlb_flush_entry(&env->tlb_write[1][i], addr);
820
#endif
821
}
822

  
823
/* make all write to page 'addr' trigger a TLB exception to detect
824
   self modifying code */
825
void tlb_flush_page_write(CPUState *env, uint32_t addr)
826
{
827
#if !defined(CONFIG_USER_ONLY)
790 828
    int i;
791 829

  
830
    addr &= TARGET_PAGE_MASK;
792 831
    i = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
793
    env->tlb_read[0][i].address = -1;
794
    env->tlb_write[0][i].address = -1;
795
    env->tlb_read[1][i].address = -1;
796
    env->tlb_write[1][i].address = -1;
832
    tlb_flush_entry(&env->tlb_write[0][i], addr);
833
    tlb_flush_entry(&env->tlb_write[1][i], addr);
797 834
#endif
798 835
}
799 836

  
......
900 937
    }
901 938
    return io_index << IO_MEM_SHIFT;
902 939
}
940

  
941
#if !defined(CONFIG_USER_ONLY) 
942

  
943
#define MMUSUFFIX _cmmu
944
#define GETPC() NULL
945
#define env cpu_single_env
946

  
947
#define SHIFT 0
948
#include "softmmu_template.h"
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950
#define SHIFT 1
951
#include "softmmu_template.h"
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953
#define SHIFT 2
954
#include "softmmu_template.h"
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956
#define SHIFT 3
957
#include "softmmu_template.h"
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959
#undef env
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#endif

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