Revision 61a8c4ec target-i386/translate.c

b/target-i386/translate.c
1690 1690
    gen_op_mov_reg_T1[OT_WORD + s->dflag][R_ESP]();
1691 1691
}
1692 1692

  
1693
/* NOTE: wrap around in 16 bit not fully handled */
1694
/* XXX: check this */
1695 1693
static void gen_enter(DisasContext *s, int esp_addend, int level)
1696 1694
{
1697
    int ot, level1, addend, opsize;
1695
    int ot, opsize;
1698 1696

  
1699 1697
    ot = s->dflag + OT_WORD;
1700 1698
    level &= 0x1f;
1701
    level1 = level;
1702 1699
    opsize = 2 << s->dflag;
1703 1700

  
1704 1701
    gen_op_movl_A0_ESP();
......
1712 1709
    gen_op_mov_TN_reg[OT_LONG][0][R_EBP]();
1713 1710
    gen_op_st_T0_A0[ot + s->mem_index]();
1714 1711
    if (level) {
1715
        while (level--) {
1716
            gen_op_addl_A0_im(-opsize);
1717
            gen_op_addl_T0_im(-opsize);
1718
            gen_op_st_T0_A0[ot + s->mem_index]();
1719
        }
1720
        gen_op_addl_A0_im(-opsize);
1721
        gen_op_st_T1_A0[ot + s->mem_index]();
1712
        gen_op_enter_level(level, s->dflag);
1722 1713
    }
1723 1714
    gen_op_mov_reg_T1[ot][R_EBP]();
1724
    addend = -esp_addend;
1725
    if (level1)
1726
        addend -= opsize * (level1 + 1);
1727
    gen_op_addl_T1_im(addend);
1715
    gen_op_addl_T1_im( -esp_addend + (-opsize * level) );
1728 1716
    gen_op_mov_reg_T1[ot][R_ESP]();
1729 1717
}
1730 1718

  

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