Revision 63242a00

b/hw/sh_serial.c
37 37
#define SH_SERIAL_FLAG_BRK  (1 << 3)
38 38
#define SH_SERIAL_FLAG_DR   (1 << 4)
39 39

  
40
#define SH_RX_FIFO_LENGTH (16)
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40 42
typedef struct {
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    uint8_t smr;
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    uint8_t brr;
......
46 48
    uint16_t fcr;
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    uint8_t sptr;
48 50

  
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    uint8_t rx_fifo[16]; /* frdr / rdr */
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    uint8_t rx_fifo[SH_RX_FIFO_LENGTH]; /* frdr / rdr */
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    uint8_t rx_cnt;
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    uint8_t rx_tail;
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    uint8_t rx_head;
51 55

  
52 56
    target_phys_addr_t base;
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    int freq;
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    int feat;
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    int flags;
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    int rtrg;
56 61

  
57 62
    CharDriverState *chr;
58 63

  
......
63 68
    struct intc_source *bri;
64 69
} sh_serial_state;
65 70

  
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static void sh_serial_clear_fifo(sh_serial_state * s)
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{
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    memset(s->rx_fifo, 0, SH_RX_FIFO_LENGTH);
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    s->rx_cnt = 0;
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    s->rx_head = 0;
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    s->rx_tail = 0;
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}
78

  
66 79
static void sh_serial_ioport_write(void *opaque, uint32_t offs, uint32_t val)
67 80
{
68 81
    sh_serial_state *s = opaque;
......
80 93
        s->brr = val;
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	return;
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    case 0x08: /* SCR */
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        /* TODO : For SH7751, SCIF mask should be 0xfb. */
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        s->scr = val & ((s->feat & SH_SERIAL_FEAT_SCIF) ? 0xfa : 0xff);
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        if (!(val & (1 << 5)))
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            s->flags |= SH_SERIAL_FLAG_TEND;
......
89 103
            else if (!(val & (1 << 7)) && s->txi->asserted)
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                sh_intc_toggle_source(s->txi, 0, -1);
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        }
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        if (!(val & (1 << 6)) && s->rxi->asserted) {
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	    sh_intc_toggle_source(s->rxi, 0, -1);
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        }
92 109
        return;
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    case 0x0c: /* FTDR / TDR */
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        if (s->chr) {
......
117 134
                s->flags &= ~SH_SERIAL_FLAG_RDF;
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            if (!(val & (1 << 0)))
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                s->flags &= ~SH_SERIAL_FLAG_DR;
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            if (!(val & (1 << 1)) || !(val & (1 << 0))) {
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                if (s->rxi && s->rxi->asserted) {
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                    sh_intc_toggle_source(s->rxi, 0, -1);
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                }
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            }
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            return;
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        case 0x18: /* FCR */
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            s->fcr = val;
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            switch ((val >> 6) & 3) {
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            case 0:
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                s->rtrg = 1;
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                break;
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            case 1:
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                s->rtrg = 4;
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                break;
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            case 2:
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                s->rtrg = 8;
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                break;
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            case 3:
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                s->rtrg = 14;
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                break;
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            }
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            if (val & (1 << 1)) {
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                sh_serial_clear_fifo(s);
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                s->sr &= ~(1 << 1);
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            }
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123 165
            return;
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        case 0x20: /* SPTR */
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            s->sptr = val;
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            s->sptr = val & 0xf3;
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            return;
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        case 0x24: /* LSR */
128 170
            return;
......
190 232
            if (s->flags & SH_SERIAL_FLAG_DR)
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                ret |= (1 << 0);
192 234

  
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	    if (s->scr & (1 << 5))
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            if (s->scr & (1 << 5))
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                s->flags |= SH_SERIAL_FLAG_TDE | SH_SERIAL_FLAG_TEND;
195 237

  
196 238
            break;
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        case 0x14:
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            if (s->rx_cnt > 0) {
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                ret = s->rx_fifo[s->rx_tail++];
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                s->rx_cnt--;
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                if (s->rx_tail == SH_RX_FIFO_LENGTH)
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                    s->rx_tail = 0;
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                if (s->rx_cnt < s->rtrg)
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                    s->flags &= ~SH_SERIAL_FLAG_RDF;
247
            }
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            break;
197 249
#if 0
198 250
        case 0x18:
199 251
            ret = s->fcr;
......
219 271
        case 0x10:
220 272
            ret = 0;
221 273
            break;
274
        case 0x14:
275
            ret = s->rx_fifo[0];
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            break;
222 277
        case 0x1c:
223 278
            ret = s->sptr;
224 279
            break;
......
240 295

  
241 296
static int sh_serial_can_receive(sh_serial_state *s)
242 297
{
243
    return 0;
298
    return s->scr & (1 << 4);
244 299
}
245 300

  
246 301
static void sh_serial_receive_byte(sh_serial_state *s, int ch)
247 302
{
303
    if (s->feat & SH_SERIAL_FEAT_SCIF) {
304
        if (s->rx_cnt < SH_RX_FIFO_LENGTH) {
305
            s->rx_fifo[s->rx_head++] = ch;
306
            if (s->rx_head == SH_RX_FIFO_LENGTH)
307
                s->rx_head = 0;
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            s->rx_cnt++;
309
            if (s->rx_cnt >= s->rtrg) {
310
                s->flags |= SH_SERIAL_FLAG_RDF;
311
                if (s->scr & (1 << 6) && s->rxi) {
312
                    sh_intc_toggle_source(s->rxi, 0, 1);
313
                }
314
            }
315
        }
316
    } else {
317
        s->rx_fifo[0] = ch;
318
    }
248 319
}
249 320

  
250 321
static void sh_serial_receive_break(sh_serial_state *s)
251 322
{
323
    if (s->feat & SH_SERIAL_FEAT_SCIF)
324
        s->sr |= (1 << 4);
252 325
}
253 326

  
254 327
static int sh_serial_can_receive1(void *opaque)
......
313 386
    s->base = base;
314 387
    s->feat = feat;
315 388
    s->flags = SH_SERIAL_FLAG_TEND | SH_SERIAL_FLAG_TDE;
389
    s->rtrg = 1;
316 390

  
317 391
    s->smr = 0;
318 392
    s->brr = 0xff;
......
326 400
        s->dr = 0xff;
327 401
    }
328 402

  
329
    s->rx_cnt = 0;
403
    sh_serial_clear_fifo(s);
330 404

  
331 405
    s_io_memory = cpu_register_io_memory(0, sh_serial_readfn,
332 406
					 sh_serial_writefn, s);

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