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1
/*
2
 *  i386 micro operations
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 * 
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14
 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#define ASM_SOFTMMU
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#include "exec.h"
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/* n must be a constant to be efficient */
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static inline target_long lshift(target_long x, int n)
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{
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    if (n >= 0)
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        return x << n;
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    else
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        return x >> (-n);
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}
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/* we define the various pieces of code used by the JIT */
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#define REG EAX
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#define REGNAME _EAX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ECX
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#define REGNAME _ECX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EDX
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#define REGNAME _EDX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EBX
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#define REGNAME _EBX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ESP
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#define REGNAME _ESP
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EBP
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#define REGNAME _EBP
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ESI
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#define REGNAME _ESI
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EDI
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#define REGNAME _EDI
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
82

    
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#ifdef TARGET_X86_64
84

    
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#define REG (env->regs[8])
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#define REGNAME _R8
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
90

    
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#define REG (env->regs[9])
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#define REGNAME _R9
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
96

    
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#define REG (env->regs[10])
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#define REGNAME _R10
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#include "opreg_template.h"
100
#undef REG
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#undef REGNAME
102

    
103
#define REG (env->regs[11])
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#define REGNAME _R11
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[12])
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#define REGNAME _R12
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#include "opreg_template.h"
112
#undef REG
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#undef REGNAME
114

    
115
#define REG (env->regs[13])
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#define REGNAME _R13
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
120

    
121
#define REG (env->regs[14])
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#define REGNAME _R14
123
#include "opreg_template.h"
124
#undef REG
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#undef REGNAME
126

    
127
#define REG (env->regs[15])
128
#define REGNAME _R15
129
#include "opreg_template.h"
130
#undef REG
131
#undef REGNAME
132

    
133
#endif
134

    
135
/* operations with flags */
136

    
137
/* update flags with T0 and T1 (add/sub case) */
138
void OPPROTO op_update2_cc(void)
139
{
140
    CC_SRC = T1;
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    CC_DST = T0;
142
}
143

    
144
/* update flags with T0 (logic operation case) */
145
void OPPROTO op_update1_cc(void)
146
{
147
    CC_DST = T0;
148
}
149

    
150
void OPPROTO op_update_neg_cc(void)
151
{
152
    CC_SRC = -T0;
153
    CC_DST = T0;
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}
155

    
156
void OPPROTO op_cmpl_T0_T1_cc(void)
157
{
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    CC_SRC = T1;
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    CC_DST = T0 - T1;
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}
161

    
162
void OPPROTO op_update_inc_cc(void)
163
{
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    CC_SRC = cc_table[CC_OP].compute_c();
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    CC_DST = T0;
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}
167

    
168
void OPPROTO op_testl_T0_T1_cc(void)
169
{
170
    CC_DST = T0 & T1;
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}
172

    
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/* operations without flags */
174

    
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void OPPROTO op_addl_T0_T1(void)
176
{
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    T0 += T1;
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}
179

    
180
void OPPROTO op_orl_T0_T1(void)
181
{
182
    T0 |= T1;
183
}
184

    
185
void OPPROTO op_andl_T0_T1(void)
186
{
187
    T0 &= T1;
188
}
189

    
190
void OPPROTO op_subl_T0_T1(void)
191
{
192
    T0 -= T1;
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}
194

    
195
void OPPROTO op_xorl_T0_T1(void)
196
{
197
    T0 ^= T1;
198
}
199

    
200
void OPPROTO op_negl_T0(void)
201
{
202
    T0 = -T0;
203
}
204

    
205
void OPPROTO op_incl_T0(void)
206
{
207
    T0++;
208
}
209

    
210
void OPPROTO op_decl_T0(void)
211
{
212
    T0--;
213
}
214

    
215
void OPPROTO op_notl_T0(void)
216
{
217
    T0 = ~T0;
218
}
219

    
220
void OPPROTO op_bswapl_T0(void)
221
{
222
    T0 = bswap32(T0);
223
}
224

    
225
#ifdef TARGET_X86_64
226
void OPPROTO op_bswapq_T0(void)
227
{
228
    T0 = bswap64(T0);
229
}
230
#endif
231

    
232
/* multiply/divide */
233

    
234
/* XXX: add eflags optimizations */
235
/* XXX: add non P4 style flags */
236

    
237
void OPPROTO op_mulb_AL_T0(void)
238
{
239
    unsigned int res;
240
    res = (uint8_t)EAX * (uint8_t)T0;
241
    EAX = (EAX & ~0xffff) | res;
242
    CC_DST = res;
243
    CC_SRC = (res & 0xff00);
244
}
245

    
246
void OPPROTO op_imulb_AL_T0(void)
247
{
248
    int res;
249
    res = (int8_t)EAX * (int8_t)T0;
250
    EAX = (EAX & ~0xffff) | (res & 0xffff);
251
    CC_DST = res;
252
    CC_SRC = (res != (int8_t)res);
253
}
254

    
255
void OPPROTO op_mulw_AX_T0(void)
256
{
257
    unsigned int res;
258
    res = (uint16_t)EAX * (uint16_t)T0;
259
    EAX = (EAX & ~0xffff) | (res & 0xffff);
260
    EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
261
    CC_DST = res;
262
    CC_SRC = res >> 16;
263
}
264

    
265
void OPPROTO op_imulw_AX_T0(void)
266
{
267
    int res;
268
    res = (int16_t)EAX * (int16_t)T0;
269
    EAX = (EAX & ~0xffff) | (res & 0xffff);
270
    EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
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    CC_DST = res;
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    CC_SRC = (res != (int16_t)res);
273
}
274

    
275
void OPPROTO op_mull_EAX_T0(void)
276
{
277
    uint64_t res;
278
    res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
279
    EAX = (uint32_t)res;
280
    EDX = (uint32_t)(res >> 32);
281
    CC_DST = (uint32_t)res;
282
    CC_SRC = (uint32_t)(res >> 32);
283
}
284

    
285
void OPPROTO op_imull_EAX_T0(void)
286
{
287
    int64_t res;
288
    res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
289
    EAX = (uint32_t)(res);
290
    EDX = (uint32_t)(res >> 32);
291
    CC_DST = res;
292
    CC_SRC = (res != (int32_t)res);
293
}
294

    
295
void OPPROTO op_imulw_T0_T1(void)
296
{
297
    int res;
298
    res = (int16_t)T0 * (int16_t)T1;
299
    T0 = res;
300
    CC_DST = res;
301
    CC_SRC = (res != (int16_t)res);
302
}
303

    
304
void OPPROTO op_imull_T0_T1(void)
305
{
306
    int64_t res;
307
    res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
308
    T0 = res;
309
    CC_DST = res;
310
    CC_SRC = (res != (int32_t)res);
311
}
312

    
313
#ifdef TARGET_X86_64
314
void OPPROTO op_mulq_EAX_T0(void)
315
{
316
    helper_mulq_EAX_T0();
317
}
318

    
319
void OPPROTO op_imulq_EAX_T0(void)
320
{
321
    helper_imulq_EAX_T0();
322
}
323

    
324
void OPPROTO op_imulq_T0_T1(void)
325
{
326
    helper_imulq_T0_T1();
327
}
328
#endif
329

    
330
/* division, flags are undefined */
331

    
332
void OPPROTO op_divb_AL_T0(void)
333
{
334
    unsigned int num, den, q, r;
335

    
336
    num = (EAX & 0xffff);
337
    den = (T0 & 0xff);
338
    if (den == 0) {
339
        raise_exception(EXCP00_DIVZ);
340
    }
341
    q = (num / den);
342
    if (q > 0xff)
343
        raise_exception(EXCP00_DIVZ);
344
    q &= 0xff;
345
    r = (num % den) & 0xff;
346
    EAX = (EAX & ~0xffff) | (r << 8) | q;
347
}
348

    
349
void OPPROTO op_idivb_AL_T0(void)
350
{
351
    int num, den, q, r;
352

    
353
    num = (int16_t)EAX;
354
    den = (int8_t)T0;
355
    if (den == 0) {
356
        raise_exception(EXCP00_DIVZ);
357
    }
358
    q = (num / den);
359
    if (q != (int8_t)q)
360
        raise_exception(EXCP00_DIVZ);
361
    q &= 0xff;
362
    r = (num % den) & 0xff;
363
    EAX = (EAX & ~0xffff) | (r << 8) | q;
364
}
365

    
366
void OPPROTO op_divw_AX_T0(void)
367
{
368
    unsigned int num, den, q, r;
369

    
370
    num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
371
    den = (T0 & 0xffff);
372
    if (den == 0) {
373
        raise_exception(EXCP00_DIVZ);
374
    }
375
    q = (num / den);
376
    if (q > 0xffff)
377
        raise_exception(EXCP00_DIVZ);
378
    q &= 0xffff;
379
    r = (num % den) & 0xffff;
380
    EAX = (EAX & ~0xffff) | q;
381
    EDX = (EDX & ~0xffff) | r;
382
}
383

    
384
void OPPROTO op_idivw_AX_T0(void)
385
{
386
    int num, den, q, r;
387

    
388
    num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
389
    den = (int16_t)T0;
390
    if (den == 0) {
391
        raise_exception(EXCP00_DIVZ);
392
    }
393
    q = (num / den);
394
    if (q != (int16_t)q)
395
        raise_exception(EXCP00_DIVZ);
396
    q &= 0xffff;
397
    r = (num % den) & 0xffff;
398
    EAX = (EAX & ~0xffff) | q;
399
    EDX = (EDX & ~0xffff) | r;
400
}
401

    
402
void OPPROTO op_divl_EAX_T0(void)
403
{
404
    helper_divl_EAX_T0();
405
}
406

    
407
void OPPROTO op_idivl_EAX_T0(void)
408
{
409
    helper_idivl_EAX_T0();
410
}
411

    
412
#ifdef TARGET_X86_64
413
void OPPROTO op_divq_EAX_T0(void)
414
{
415
    helper_divq_EAX_T0();
416
}
417

    
418
void OPPROTO op_idivq_EAX_T0(void)
419
{
420
    helper_idivq_EAX_T0();
421
}
422
#endif
423

    
424
/* constant load & misc op */
425

    
426
/* XXX: consistent names */
427
void OPPROTO op_movl_T0_imu(void)
428
{
429
    T0 = (uint32_t)PARAM1;
430
}
431

    
432
void OPPROTO op_movl_T0_im(void)
433
{
434
    T0 = (int32_t)PARAM1;
435
}
436

    
437
void OPPROTO op_addl_T0_im(void)
438
{
439
    T0 += PARAM1;
440
}
441

    
442
void OPPROTO op_andl_T0_ffff(void)
443
{
444
    T0 = T0 & 0xffff;
445
}
446

    
447
void OPPROTO op_andl_T0_im(void)
448
{
449
    T0 = T0 & PARAM1;
450
}
451

    
452
void OPPROTO op_movl_T0_T1(void)
453
{
454
    T0 = T1;
455
}
456

    
457
void OPPROTO op_movl_T1_imu(void)
458
{
459
    T1 = (uint32_t)PARAM1;
460
}
461

    
462
void OPPROTO op_movl_T1_im(void)
463
{
464
    T1 = (int32_t)PARAM1;
465
}
466

    
467
void OPPROTO op_addl_T1_im(void)
468
{
469
    T1 += PARAM1;
470
}
471

    
472
void OPPROTO op_movl_T1_A0(void)
473
{
474
    T1 = A0;
475
}
476

    
477
void OPPROTO op_movl_A0_im(void)
478
{
479
    A0 = (uint32_t)PARAM1;
480
}
481

    
482
void OPPROTO op_addl_A0_im(void)
483
{
484
    A0 = (uint32_t)(A0 + PARAM1);
485
}
486

    
487
void OPPROTO op_movl_A0_seg(void)
488
{
489
    A0 = (uint32_t)*(target_ulong *)((char *)env + PARAM1);
490
}
491

    
492
void OPPROTO op_addl_A0_seg(void)
493
{
494
    A0 = (uint32_t)(A0 + *(target_ulong *)((char *)env + PARAM1));
495
}
496

    
497
void OPPROTO op_addl_A0_AL(void)
498
{
499
    A0 = (uint32_t)(A0 + (EAX & 0xff));
500
}
501

    
502
#ifdef WORDS_BIGENDIAN
503
typedef union UREG64 {
504
    struct { uint16_t v3, v2, v1, v0; } w;
505
    struct { uint32_t v1, v0; } l;
506
    uint64_t q;
507
} UREG64;
508
#else
509
typedef union UREG64 {
510
    struct { uint16_t v0, v1, v2, v3; } w;
511
    struct { uint32_t v0, v1; } l;
512
    uint64_t q;
513
} UREG64;
514
#endif
515

    
516
#ifdef TARGET_X86_64
517

    
518
#define PARAMQ1 \
519
({\
520
    UREG64 __p;\
521
    __p.l.v1 = PARAM1;\
522
    __p.l.v0 = PARAM2;\
523
    __p.q;\
524
}) 
525

    
526
void OPPROTO op_movq_T0_im64(void)
527
{
528
    T0 = PARAMQ1;
529
}
530

    
531
void OPPROTO op_movq_T1_im64(void)
532
{
533
    T1 = PARAMQ1;
534
}
535

    
536
void OPPROTO op_movq_A0_im(void)
537
{
538
    A0 = (int32_t)PARAM1;
539
}
540

    
541
void OPPROTO op_movq_A0_im64(void)
542
{
543
    A0 = PARAMQ1;
544
}
545

    
546
void OPPROTO op_addq_A0_im(void)
547
{
548
    A0 = (A0 + (int32_t)PARAM1);
549
}
550

    
551
void OPPROTO op_addq_A0_im64(void)
552
{
553
    A0 = (A0 + PARAMQ1);
554
}
555

    
556
void OPPROTO op_movq_A0_seg(void)
557
{
558
    A0 = *(target_ulong *)((char *)env + PARAM1);
559
}
560

    
561
void OPPROTO op_addq_A0_seg(void)
562
{
563
    A0 += *(target_ulong *)((char *)env + PARAM1);
564
}
565

    
566
void OPPROTO op_addq_A0_AL(void)
567
{
568
    A0 = (A0 + (EAX & 0xff));
569
}
570

    
571
#endif
572

    
573
void OPPROTO op_andl_A0_ffff(void)
574
{
575
    A0 = A0 & 0xffff;
576
}
577

    
578
/* memory access */
579

    
580
#define MEMSUFFIX _raw
581
#include "ops_mem.h"
582

    
583
#if !defined(CONFIG_USER_ONLY)
584
#define MEMSUFFIX _kernel
585
#include "ops_mem.h"
586

    
587
#define MEMSUFFIX _user
588
#include "ops_mem.h"
589
#endif
590

    
591
/* indirect jump */
592

    
593
void OPPROTO op_jmp_T0(void)
594
{
595
    EIP = T0;
596
}
597

    
598
void OPPROTO op_movl_eip_im(void)
599
{
600
    EIP = (uint32_t)PARAM1;
601
}
602

    
603
#ifdef TARGET_X86_64
604
void OPPROTO op_movq_eip_im(void)
605
{
606
    EIP = (int32_t)PARAM1;
607
}
608

    
609
void OPPROTO op_movq_eip_im64(void)
610
{
611
    EIP = PARAMQ1;
612
}
613
#endif
614

    
615
void OPPROTO op_hlt(void)
616
{
617
    env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
618
    env->hflags |= HF_HALTED_MASK;
619
    env->exception_index = EXCP_HLT;
620
    cpu_loop_exit();
621
}
622

    
623
void OPPROTO op_debug(void)
624
{
625
    env->exception_index = EXCP_DEBUG;
626
    cpu_loop_exit();
627
}
628

    
629
void OPPROTO op_raise_interrupt(void)
630
{
631
    int intno, next_eip_addend;
632
    intno = PARAM1;
633
    next_eip_addend = PARAM2;
634
    raise_interrupt(intno, 1, 0, next_eip_addend);
635
}
636

    
637
void OPPROTO op_raise_exception(void)
638
{
639
    int exception_index;
640
    exception_index = PARAM1;
641
    raise_exception(exception_index);
642
}
643

    
644
void OPPROTO op_into(void)
645
{
646
    int eflags;
647
    eflags = cc_table[CC_OP].compute_all();
648
    if (eflags & CC_O) {
649
        raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
650
    }
651
    FORCE_RET();
652
}
653

    
654
void OPPROTO op_cli(void)
655
{
656
    env->eflags &= ~IF_MASK;
657
}
658

    
659
void OPPROTO op_sti(void)
660
{
661
    env->eflags |= IF_MASK;
662
}
663

    
664
void OPPROTO op_set_inhibit_irq(void)
665
{
666
    env->hflags |= HF_INHIBIT_IRQ_MASK;
667
}
668

    
669
void OPPROTO op_reset_inhibit_irq(void)
670
{
671
    env->hflags &= ~HF_INHIBIT_IRQ_MASK;
672
}
673

    
674
#if 0
675
/* vm86plus instructions */
676
void OPPROTO op_cli_vm(void)
677
{
678
    env->eflags &= ~VIF_MASK;
679
}
680

681
void OPPROTO op_sti_vm(void)
682
{
683
    env->eflags |= VIF_MASK;
684
    if (env->eflags & VIP_MASK) {
685
        EIP = PARAM1;
686
        raise_exception(EXCP0D_GPF);
687
    }
688
    FORCE_RET();
689
}
690
#endif
691

    
692
void OPPROTO op_boundw(void)
693
{
694
    int low, high, v;
695
    low = ldsw(A0);
696
    high = ldsw(A0 + 2);
697
    v = (int16_t)T0;
698
    if (v < low || v > high) {
699
        raise_exception(EXCP05_BOUND);
700
    }
701
    FORCE_RET();
702
}
703

    
704
void OPPROTO op_boundl(void)
705
{
706
    int low, high, v;
707
    low = ldl(A0);
708
    high = ldl(A0 + 4);
709
    v = T0;
710
    if (v < low || v > high) {
711
        raise_exception(EXCP05_BOUND);
712
    }
713
    FORCE_RET();
714
}
715

    
716
void OPPROTO op_cmpxchg8b(void)
717
{
718
    helper_cmpxchg8b();
719
}
720

    
721
void OPPROTO op_movl_T0_0(void)
722
{
723
    T0 = 0;
724
}
725

    
726
void OPPROTO op_exit_tb(void)
727
{
728
    EXIT_TB();
729
}
730

    
731
/* multiple size ops */
732

    
733
#define ldul ldl
734

    
735
#define SHIFT 0
736
#include "ops_template.h"
737
#undef SHIFT
738

    
739
#define SHIFT 1
740
#include "ops_template.h"
741
#undef SHIFT
742

    
743
#define SHIFT 2
744
#include "ops_template.h"
745
#undef SHIFT
746

    
747
#ifdef TARGET_X86_64
748

    
749
#define SHIFT 3
750
#include "ops_template.h"
751
#undef SHIFT
752

    
753
#endif
754

    
755
/* sign extend */
756

    
757
void OPPROTO op_movsbl_T0_T0(void)
758
{
759
    T0 = (int8_t)T0;
760
}
761

    
762
void OPPROTO op_movzbl_T0_T0(void)
763
{
764
    T0 = (uint8_t)T0;
765
}
766

    
767
void OPPROTO op_movswl_T0_T0(void)
768
{
769
    T0 = (int16_t)T0;
770
}
771

    
772
void OPPROTO op_movzwl_T0_T0(void)
773
{
774
    T0 = (uint16_t)T0;
775
}
776

    
777
void OPPROTO op_movswl_EAX_AX(void)
778
{
779
    EAX = (int16_t)EAX;
780
}
781

    
782
#ifdef TARGET_X86_64
783
void OPPROTO op_movslq_T0_T0(void)
784
{
785
    T0 = (int32_t)T0;
786
}
787

    
788
void OPPROTO op_movslq_RAX_EAX(void)
789
{
790
    EAX = (int32_t)EAX;
791
}
792
#endif
793

    
794
void OPPROTO op_movsbw_AX_AL(void)
795
{
796
    EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
797
}
798

    
799
void OPPROTO op_movslq_EDX_EAX(void)
800
{
801
    EDX = (int32_t)EAX >> 31;
802
}
803

    
804
void OPPROTO op_movswl_DX_AX(void)
805
{
806
    EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
807
}
808

    
809
#ifdef TARGET_X86_64
810
void OPPROTO op_movsqo_RDX_RAX(void)
811
{
812
    EDX = (int64_t)EAX >> 63;
813
}
814
#endif
815

    
816
/* string ops helpers */
817

    
818
void OPPROTO op_addl_ESI_T0(void)
819
{
820
    ESI = (uint32_t)(ESI + T0);
821
}
822

    
823
void OPPROTO op_addw_ESI_T0(void)
824
{
825
    ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
826
}
827

    
828
void OPPROTO op_addl_EDI_T0(void)
829
{
830
    EDI = (uint32_t)(EDI + T0);
831
}
832

    
833
void OPPROTO op_addw_EDI_T0(void)
834
{
835
    EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
836
}
837

    
838
void OPPROTO op_decl_ECX(void)
839
{
840
    ECX = (uint32_t)(ECX - 1);
841
}
842

    
843
void OPPROTO op_decw_ECX(void)
844
{
845
    ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
846
}
847

    
848
#ifdef TARGET_X86_64
849
void OPPROTO op_addq_ESI_T0(void)
850
{
851
    ESI = (ESI + T0);
852
}
853

    
854
void OPPROTO op_addq_EDI_T0(void)
855
{
856
    EDI = (EDI + T0);
857
}
858

    
859
void OPPROTO op_decq_ECX(void)
860
{
861
    ECX--;
862
}
863
#endif
864

    
865
/* push/pop utils */
866

    
867
void op_addl_A0_SS(void)
868
{
869
    A0 = (uint32_t)(A0 + env->segs[R_SS].base);
870
}
871

    
872
void op_subl_A0_2(void)
873
{
874
    A0 = (uint32_t)(A0 - 2);
875
}
876

    
877
void op_subl_A0_4(void)
878
{
879
    A0 = (uint32_t)(A0 - 4);
880
}
881

    
882
void op_addl_ESP_4(void)
883
{
884
    ESP = (uint32_t)(ESP + 4);
885
}
886

    
887
void op_addl_ESP_2(void)
888
{
889
    ESP = (uint32_t)(ESP + 2);
890
}
891

    
892
void op_addw_ESP_4(void)
893
{
894
    ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
895
}
896

    
897
void op_addw_ESP_2(void)
898
{
899
    ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
900
}
901

    
902
void op_addl_ESP_im(void)
903
{
904
    ESP = (uint32_t)(ESP + PARAM1);
905
}
906

    
907
void op_addw_ESP_im(void)
908
{
909
    ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
910
}
911

    
912
#ifdef TARGET_X86_64
913
void op_subq_A0_2(void)
914
{
915
    A0 -= 2;
916
}
917

    
918
void op_subq_A0_8(void)
919
{
920
    A0 -= 8;
921
}
922

    
923
void op_addq_ESP_8(void)
924
{
925
    ESP += 8;
926
}
927

    
928
void op_addq_ESP_im(void)
929
{
930
    ESP += PARAM1;
931
}
932
#endif
933

    
934
void OPPROTO op_rdtsc(void)
935
{
936
    helper_rdtsc();
937
}
938

    
939
void OPPROTO op_cpuid(void)
940
{
941
    helper_cpuid();
942
}
943

    
944
void OPPROTO op_enter_level(void)
945
{
946
    helper_enter_level(PARAM1, PARAM2);
947
}
948

    
949
#ifdef TARGET_X86_64
950
void OPPROTO op_enter64_level(void)
951
{
952
    helper_enter64_level(PARAM1, PARAM2);
953
}
954
#endif
955

    
956
void OPPROTO op_sysenter(void)
957
{
958
    helper_sysenter();
959
}
960

    
961
void OPPROTO op_sysexit(void)
962
{
963
    helper_sysexit();
964
}
965

    
966
#ifdef TARGET_X86_64
967
void OPPROTO op_syscall(void)
968
{
969
    helper_syscall(PARAM1);
970
}
971

    
972
void OPPROTO op_sysret(void)
973
{
974
    helper_sysret(PARAM1);
975
}
976
#endif
977

    
978
void OPPROTO op_rdmsr(void)
979
{
980
    helper_rdmsr();
981
}
982

    
983
void OPPROTO op_wrmsr(void)
984
{
985
    helper_wrmsr();
986
}
987

    
988
/* bcd */
989

    
990
/* XXX: exception */
991
void OPPROTO op_aam(void)
992
{
993
    int base = PARAM1;
994
    int al, ah;
995
    al = EAX & 0xff;
996
    ah = al / base;
997
    al = al % base;
998
    EAX = (EAX & ~0xffff) | al | (ah << 8);
999
    CC_DST = al;
1000
}
1001

    
1002
void OPPROTO op_aad(void)
1003
{
1004
    int base = PARAM1;
1005
    int al, ah;
1006
    al = EAX & 0xff;
1007
    ah = (EAX >> 8) & 0xff;
1008
    al = ((ah * base) + al) & 0xff;
1009
    EAX = (EAX & ~0xffff) | al;
1010
    CC_DST = al;
1011
}
1012

    
1013
void OPPROTO op_aaa(void)
1014
{
1015
    int icarry;
1016
    int al, ah, af;
1017
    int eflags;
1018

    
1019
    eflags = cc_table[CC_OP].compute_all();
1020
    af = eflags & CC_A;
1021
    al = EAX & 0xff;
1022
    ah = (EAX >> 8) & 0xff;
1023

    
1024
    icarry = (al > 0xf9);
1025
    if (((al & 0x0f) > 9 ) || af) {
1026
        al = (al + 6) & 0x0f;
1027
        ah = (ah + 1 + icarry) & 0xff;
1028
        eflags |= CC_C | CC_A;
1029
    } else {
1030
        eflags &= ~(CC_C | CC_A);
1031
        al &= 0x0f;
1032
    }
1033
    EAX = (EAX & ~0xffff) | al | (ah << 8);
1034
    CC_SRC = eflags;
1035
    FORCE_RET();
1036
}
1037

    
1038
void OPPROTO op_aas(void)
1039
{
1040
    int icarry;
1041
    int al, ah, af;
1042
    int eflags;
1043

    
1044
    eflags = cc_table[CC_OP].compute_all();
1045
    af = eflags & CC_A;
1046
    al = EAX & 0xff;
1047
    ah = (EAX >> 8) & 0xff;
1048

    
1049
    icarry = (al < 6);
1050
    if (((al & 0x0f) > 9 ) || af) {
1051
        al = (al - 6) & 0x0f;
1052
        ah = (ah - 1 - icarry) & 0xff;
1053
        eflags |= CC_C | CC_A;
1054
    } else {
1055
        eflags &= ~(CC_C | CC_A);
1056
        al &= 0x0f;
1057
    }
1058
    EAX = (EAX & ~0xffff) | al | (ah << 8);
1059
    CC_SRC = eflags;
1060
    FORCE_RET();
1061
}
1062

    
1063
void OPPROTO op_daa(void)
1064
{
1065
    int al, af, cf;
1066
    int eflags;
1067

    
1068
    eflags = cc_table[CC_OP].compute_all();
1069
    cf = eflags & CC_C;
1070
    af = eflags & CC_A;
1071
    al = EAX & 0xff;
1072

    
1073
    eflags = 0;
1074
    if (((al & 0x0f) > 9 ) || af) {
1075
        al = (al + 6) & 0xff;
1076
        eflags |= CC_A;
1077
    }
1078
    if ((al > 0x9f) || cf) {
1079
        al = (al + 0x60) & 0xff;
1080
        eflags |= CC_C;
1081
    }
1082
    EAX = (EAX & ~0xff) | al;
1083
    /* well, speed is not an issue here, so we compute the flags by hand */
1084
    eflags |= (al == 0) << 6; /* zf */
1085
    eflags |= parity_table[al]; /* pf */
1086
    eflags |= (al & 0x80); /* sf */
1087
    CC_SRC = eflags;
1088
    FORCE_RET();
1089
}
1090

    
1091
void OPPROTO op_das(void)
1092
{
1093
    int al, al1, af, cf;
1094
    int eflags;
1095

    
1096
    eflags = cc_table[CC_OP].compute_all();
1097
    cf = eflags & CC_C;
1098
    af = eflags & CC_A;
1099
    al = EAX & 0xff;
1100

    
1101
    eflags = 0;
1102
    al1 = al;
1103
    if (((al & 0x0f) > 9 ) || af) {
1104
        eflags |= CC_A;
1105
        if (al < 6 || cf)
1106
            eflags |= CC_C;
1107
        al = (al - 6) & 0xff;
1108
    }
1109
    if ((al1 > 0x99) || cf) {
1110
        al = (al - 0x60) & 0xff;
1111
        eflags |= CC_C;
1112
    }
1113
    EAX = (EAX & ~0xff) | al;
1114
    /* well, speed is not an issue here, so we compute the flags by hand */
1115
    eflags |= (al == 0) << 6; /* zf */
1116
    eflags |= parity_table[al]; /* pf */
1117
    eflags |= (al & 0x80); /* sf */
1118
    CC_SRC = eflags;
1119
    FORCE_RET();
1120
}
1121

    
1122
/* segment handling */
1123

    
1124
/* never use it with R_CS */
1125
void OPPROTO op_movl_seg_T0(void)
1126
{
1127
    load_seg(PARAM1, T0);
1128
}
1129

    
1130
/* faster VM86 version */
1131
void OPPROTO op_movl_seg_T0_vm(void)
1132
{
1133
    int selector;
1134
    SegmentCache *sc;
1135
    
1136
    selector = T0 & 0xffff;
1137
    /* env->segs[] access */
1138
    sc = (SegmentCache *)((char *)env + PARAM1);
1139
    sc->selector = selector;
1140
    sc->base = (selector << 4);
1141
}
1142

    
1143
void OPPROTO op_movl_T0_seg(void)
1144
{
1145
    T0 = env->segs[PARAM1].selector;
1146
}
1147

    
1148
void OPPROTO op_lsl(void)
1149
{
1150
    helper_lsl();
1151
}
1152

    
1153
void OPPROTO op_lar(void)
1154
{
1155
    helper_lar();
1156
}
1157

    
1158
void OPPROTO op_verr(void)
1159
{
1160
    helper_verr();
1161
}
1162

    
1163
void OPPROTO op_verw(void)
1164
{
1165
    helper_verw();
1166
}
1167

    
1168
void OPPROTO op_arpl(void)
1169
{
1170
    if ((T0 & 3) < (T1 & 3)) {
1171
        /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
1172
        T0 = (T0 & ~3) | (T1 & 3);
1173
        T1 = CC_Z;
1174
   } else {
1175
        T1 = 0;
1176
    }
1177
    FORCE_RET();
1178
}
1179
            
1180
void OPPROTO op_arpl_update(void)
1181
{
1182
    int eflags;
1183
    eflags = cc_table[CC_OP].compute_all();
1184
    CC_SRC = (eflags & ~CC_Z) | T1;
1185
}
1186
    
1187
/* T0: segment, T1:eip */
1188
void OPPROTO op_ljmp_protected_T0_T1(void)
1189
{
1190
    helper_ljmp_protected_T0_T1(PARAM1);
1191
}
1192

    
1193
void OPPROTO op_lcall_real_T0_T1(void)
1194
{
1195
    helper_lcall_real_T0_T1(PARAM1, PARAM2);
1196
}
1197

    
1198
void OPPROTO op_lcall_protected_T0_T1(void)
1199
{
1200
    helper_lcall_protected_T0_T1(PARAM1, PARAM2);
1201
}
1202

    
1203
void OPPROTO op_iret_real(void)
1204
{
1205
    helper_iret_real(PARAM1);
1206
}
1207

    
1208
void OPPROTO op_iret_protected(void)
1209
{
1210
    helper_iret_protected(PARAM1, PARAM2);
1211
}
1212

    
1213
void OPPROTO op_lret_protected(void)
1214
{
1215
    helper_lret_protected(PARAM1, PARAM2);
1216
}
1217

    
1218
void OPPROTO op_lldt_T0(void)
1219
{
1220
    helper_lldt_T0();
1221
}
1222

    
1223
void OPPROTO op_ltr_T0(void)
1224
{
1225
    helper_ltr_T0();
1226
}
1227

    
1228
/* CR registers access */
1229
void OPPROTO op_movl_crN_T0(void)
1230
{
1231
    helper_movl_crN_T0(PARAM1);
1232
}
1233

    
1234
#if !defined(CONFIG_USER_ONLY) 
1235
void OPPROTO op_movtl_T0_cr8(void)
1236
{
1237
    T0 = cpu_get_apic_tpr(env);
1238
}
1239
#endif
1240

    
1241
/* DR registers access */
1242
void OPPROTO op_movl_drN_T0(void)
1243
{
1244
    helper_movl_drN_T0(PARAM1);
1245
}
1246

    
1247
void OPPROTO op_lmsw_T0(void)
1248
{
1249
    /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1250
       if already set to one. */
1251
    T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
1252
    helper_movl_crN_T0(0);
1253
}
1254

    
1255
void OPPROTO op_invlpg_A0(void)
1256
{
1257
    helper_invlpg(A0);
1258
}
1259

    
1260
void OPPROTO op_movl_T0_env(void)
1261
{
1262
    T0 = *(uint32_t *)((char *)env + PARAM1);
1263
}
1264

    
1265
void OPPROTO op_movl_env_T0(void)
1266
{
1267
    *(uint32_t *)((char *)env + PARAM1) = T0;
1268
}
1269

    
1270
void OPPROTO op_movl_env_T1(void)
1271
{
1272
    *(uint32_t *)((char *)env + PARAM1) = T1;
1273
}
1274

    
1275
void OPPROTO op_movtl_T0_env(void)
1276
{
1277
    T0 = *(target_ulong *)((char *)env + PARAM1);
1278
}
1279

    
1280
void OPPROTO op_movtl_env_T0(void)
1281
{
1282
    *(target_ulong *)((char *)env + PARAM1) = T0;
1283
}
1284

    
1285
void OPPROTO op_movtl_T1_env(void)
1286
{
1287
    T1 = *(target_ulong *)((char *)env + PARAM1);
1288
}
1289

    
1290
void OPPROTO op_movtl_env_T1(void)
1291
{
1292
    *(target_ulong *)((char *)env + PARAM1) = T1;
1293
}
1294

    
1295
void OPPROTO op_clts(void)
1296
{
1297
    env->cr[0] &= ~CR0_TS_MASK;
1298
    env->hflags &= ~HF_TS_MASK;
1299
}
1300

    
1301
/* flags handling */
1302

    
1303
void OPPROTO op_goto_tb0(void)
1304
{
1305
    GOTO_TB(op_goto_tb0, PARAM1, 0);
1306
}
1307

    
1308
void OPPROTO op_goto_tb1(void)
1309
{
1310
    GOTO_TB(op_goto_tb1, PARAM1, 1);
1311
}
1312

    
1313
void OPPROTO op_jmp_label(void)
1314
{
1315
    GOTO_LABEL_PARAM(1);
1316
}
1317

    
1318
void OPPROTO op_jnz_T0_label(void)
1319
{
1320
    if (T0)
1321
        GOTO_LABEL_PARAM(1);
1322
    FORCE_RET();
1323
}
1324

    
1325
void OPPROTO op_jz_T0_label(void)
1326
{
1327
    if (!T0)
1328
        GOTO_LABEL_PARAM(1);
1329
    FORCE_RET();
1330
}
1331

    
1332
/* slow set cases (compute x86 flags) */
1333
void OPPROTO op_seto_T0_cc(void)
1334
{
1335
    int eflags;
1336
    eflags = cc_table[CC_OP].compute_all();
1337
    T0 = (eflags >> 11) & 1;
1338
}
1339

    
1340
void OPPROTO op_setb_T0_cc(void)
1341
{
1342
    T0 = cc_table[CC_OP].compute_c();
1343
}
1344

    
1345
void OPPROTO op_setz_T0_cc(void)
1346
{
1347
    int eflags;
1348
    eflags = cc_table[CC_OP].compute_all();
1349
    T0 = (eflags >> 6) & 1;
1350
}
1351

    
1352
void OPPROTO op_setbe_T0_cc(void)
1353
{
1354
    int eflags;
1355
    eflags = cc_table[CC_OP].compute_all();
1356
    T0 = (eflags & (CC_Z | CC_C)) != 0;
1357
}
1358

    
1359
void OPPROTO op_sets_T0_cc(void)
1360
{
1361
    int eflags;
1362
    eflags = cc_table[CC_OP].compute_all();
1363
    T0 = (eflags >> 7) & 1;
1364
}
1365

    
1366
void OPPROTO op_setp_T0_cc(void)
1367
{
1368
    int eflags;
1369
    eflags = cc_table[CC_OP].compute_all();
1370
    T0 = (eflags >> 2) & 1;
1371
}
1372

    
1373
void OPPROTO op_setl_T0_cc(void)
1374
{
1375
    int eflags;
1376
    eflags = cc_table[CC_OP].compute_all();
1377
    T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1378
}
1379

    
1380
void OPPROTO op_setle_T0_cc(void)
1381
{
1382
    int eflags;
1383
    eflags = cc_table[CC_OP].compute_all();
1384
    T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1385
}
1386

    
1387
void OPPROTO op_xor_T0_1(void)
1388
{
1389
    T0 ^= 1;
1390
}
1391

    
1392
void OPPROTO op_set_cc_op(void)
1393
{
1394
    CC_OP = PARAM1;
1395
}
1396

    
1397
void OPPROTO op_mov_T0_cc(void)
1398
{
1399
    T0 = cc_table[CC_OP].compute_all();
1400
}
1401

    
1402
/* XXX: clear VIF/VIP in all ops ? */
1403

    
1404
void OPPROTO op_movl_eflags_T0(void)
1405
{
1406
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
1407
}
1408

    
1409
void OPPROTO op_movw_eflags_T0(void)
1410
{
1411
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1412
}
1413

    
1414
void OPPROTO op_movl_eflags_T0_io(void)
1415
{
1416
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
1417
}
1418

    
1419
void OPPROTO op_movw_eflags_T0_io(void)
1420
{
1421
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
1422
}
1423

    
1424
void OPPROTO op_movl_eflags_T0_cpl0(void)
1425
{
1426
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
1427
}
1428

    
1429
void OPPROTO op_movw_eflags_T0_cpl0(void)
1430
{
1431
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
1432
}
1433

    
1434
#if 0
1435
/* vm86plus version */
1436
void OPPROTO op_movw_eflags_T0_vm(void)
1437
{
1438
    int eflags;
1439
    eflags = T0;
1440
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1441
    DF = 1 - (2 * ((eflags >> 10) & 1));
1442
    /* we also update some system flags as in user mode */
1443
    env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1444
        (eflags & FL_UPDATE_MASK16);
1445
    if (eflags & IF_MASK) {
1446
        env->eflags |= VIF_MASK;
1447
        if (env->eflags & VIP_MASK) {
1448
            EIP = PARAM1;
1449
            raise_exception(EXCP0D_GPF);
1450
        }
1451
    }
1452
    FORCE_RET();
1453
}
1454

1455
void OPPROTO op_movl_eflags_T0_vm(void)
1456
{
1457
    int eflags;
1458
    eflags = T0;
1459
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1460
    DF = 1 - (2 * ((eflags >> 10) & 1));
1461
    /* we also update some system flags as in user mode */
1462
    env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1463
        (eflags & FL_UPDATE_MASK32);
1464
    if (eflags & IF_MASK) {
1465
        env->eflags |= VIF_MASK;
1466
        if (env->eflags & VIP_MASK) {
1467
            EIP = PARAM1;
1468
            raise_exception(EXCP0D_GPF);
1469
        }
1470
    }
1471
    FORCE_RET();
1472
}
1473
#endif
1474

    
1475
/* XXX: compute only O flag */
1476
void OPPROTO op_movb_eflags_T0(void)
1477
{
1478
    int of;
1479
    of = cc_table[CC_OP].compute_all() & CC_O;
1480
    CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1481
}
1482

    
1483
void OPPROTO op_movl_T0_eflags(void)
1484
{
1485
    int eflags;
1486
    eflags = cc_table[CC_OP].compute_all();
1487
    eflags |= (DF & DF_MASK);
1488
    eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1489
    T0 = eflags;
1490
}
1491

    
1492
/* vm86plus version */
1493
#if 0
1494
void OPPROTO op_movl_T0_eflags_vm(void)
1495
{
1496
    int eflags;
1497
    eflags = cc_table[CC_OP].compute_all();
1498
    eflags |= (DF & DF_MASK);
1499
    eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1500
    if (env->eflags & VIF_MASK)
1501
        eflags |= IF_MASK;
1502
    T0 = eflags;
1503
}
1504
#endif
1505

    
1506
void OPPROTO op_cld(void)
1507
{
1508
    DF = 1;
1509
}
1510

    
1511
void OPPROTO op_std(void)
1512
{
1513
    DF = -1;
1514
}
1515

    
1516
void OPPROTO op_clc(void)
1517
{
1518
    int eflags;
1519
    eflags = cc_table[CC_OP].compute_all();
1520
    eflags &= ~CC_C;
1521
    CC_SRC = eflags;
1522
}
1523

    
1524
void OPPROTO op_stc(void)
1525
{
1526
    int eflags;
1527
    eflags = cc_table[CC_OP].compute_all();
1528
    eflags |= CC_C;
1529
    CC_SRC = eflags;
1530
}
1531

    
1532
void OPPROTO op_cmc(void)
1533
{
1534
    int eflags;
1535
    eflags = cc_table[CC_OP].compute_all();
1536
    eflags ^= CC_C;
1537
    CC_SRC = eflags;
1538
}
1539

    
1540
void OPPROTO op_salc(void)
1541
{
1542
    int cf;
1543
    cf = cc_table[CC_OP].compute_c();
1544
    EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1545
}
1546

    
1547
static int compute_all_eflags(void)
1548
{
1549
    return CC_SRC;
1550
}
1551

    
1552
static int compute_c_eflags(void)
1553
{
1554
    return CC_SRC & CC_C;
1555
}
1556

    
1557
CCTable cc_table[CC_OP_NB] = {
1558
    [CC_OP_DYNAMIC] = { /* should never happen */ },
1559

    
1560
    [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1561

    
1562
    [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1563
    [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1564
    [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
1565

    
1566
    [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1567
    [CC_OP_ADDW] = { compute_all_addw, compute_c_addw  },
1568
    [CC_OP_ADDL] = { compute_all_addl, compute_c_addl  },
1569

    
1570
    [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1571
    [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw  },
1572
    [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl  },
1573

    
1574
    [CC_OP_SUBB] = { compute_all_subb, compute_c_subb  },
1575
    [CC_OP_SUBW] = { compute_all_subw, compute_c_subw  },
1576
    [CC_OP_SUBL] = { compute_all_subl, compute_c_subl  },
1577
    
1578
    [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb  },
1579
    [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw  },
1580
    [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl  },
1581
    
1582
    [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1583
    [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1584
    [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1585
    
1586
    [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1587
    [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1588
    [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1589
    
1590
    [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1591
    [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1592
    [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1593
    
1594
    [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1595
    [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1596
    [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1597

    
1598
    [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1599
    [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1600
    [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
1601

    
1602
#ifdef TARGET_X86_64
1603
    [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1604

    
1605
    [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq  },
1606

    
1607
    [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq  },
1608

    
1609
    [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq  },
1610
    
1611
    [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq  },
1612
    
1613
    [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1614
    
1615
    [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1616

    
1617
    [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1618

    
1619
    [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1620

    
1621
    [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1622
#endif
1623
};
1624

    
1625
/* floating point support. Some of the code for complicated x87
1626
   functions comes from the LGPL'ed x86 emulator found in the Willows
1627
   TWIN windows emulator. */
1628

    
1629
/* fp load FT0 */
1630

    
1631
void OPPROTO op_flds_FT0_A0(void)
1632
{
1633
#ifdef USE_FP_CONVERT
1634
    FP_CONVERT.i32 = ldl(A0);
1635
    FT0 = FP_CONVERT.f;
1636
#else
1637
    FT0 = ldfl(A0);
1638
#endif
1639
}
1640

    
1641
void OPPROTO op_fldl_FT0_A0(void)
1642
{
1643
#ifdef USE_FP_CONVERT
1644
    FP_CONVERT.i64 = ldq(A0);
1645
    FT0 = FP_CONVERT.d;
1646
#else
1647
    FT0 = ldfq(A0);
1648
#endif
1649
}
1650

    
1651
/* helpers are needed to avoid static constant reference. XXX: find a better way */
1652
#ifdef USE_INT_TO_FLOAT_HELPERS
1653

    
1654
void helper_fild_FT0_A0(void)
1655
{
1656
    FT0 = (CPU86_LDouble)ldsw(A0);
1657
}
1658

    
1659
void helper_fildl_FT0_A0(void)
1660
{
1661
    FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1662
}
1663

    
1664
void helper_fildll_FT0_A0(void)
1665
{
1666
    FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1667
}
1668

    
1669
void OPPROTO op_fild_FT0_A0(void)
1670
{
1671
    helper_fild_FT0_A0();
1672
}
1673

    
1674
void OPPROTO op_fildl_FT0_A0(void)
1675
{
1676
    helper_fildl_FT0_A0();
1677
}
1678

    
1679
void OPPROTO op_fildll_FT0_A0(void)
1680
{
1681
    helper_fildll_FT0_A0();
1682
}
1683

    
1684
#else
1685

    
1686
void OPPROTO op_fild_FT0_A0(void)
1687
{
1688
#ifdef USE_FP_CONVERT
1689
    FP_CONVERT.i32 = ldsw(A0);
1690
    FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1691
#else
1692
    FT0 = (CPU86_LDouble)ldsw(A0);
1693
#endif
1694
}
1695

    
1696
void OPPROTO op_fildl_FT0_A0(void)
1697
{
1698
#ifdef USE_FP_CONVERT
1699
    FP_CONVERT.i32 = (int32_t) ldl(A0);
1700
    FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1701
#else
1702
    FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
1703
#endif
1704
}
1705

    
1706
void OPPROTO op_fildll_FT0_A0(void)
1707
{
1708
#ifdef USE_FP_CONVERT
1709
    FP_CONVERT.i64 = (int64_t) ldq(A0);
1710
    FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1711
#else
1712
    FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
1713
#endif
1714
}
1715
#endif
1716

    
1717
/* fp load ST0 */
1718

    
1719
void OPPROTO op_flds_ST0_A0(void)
1720
{
1721
    int new_fpstt;
1722
    new_fpstt = (env->fpstt - 1) & 7;
1723
#ifdef USE_FP_CONVERT
1724
    FP_CONVERT.i32 = ldl(A0);
1725
    env->fpregs[new_fpstt].d = FP_CONVERT.f;
1726
#else
1727
    env->fpregs[new_fpstt].d = ldfl(A0);
1728
#endif
1729
    env->fpstt = new_fpstt;
1730
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1731
}
1732

    
1733
void OPPROTO op_fldl_ST0_A0(void)
1734
{
1735
    int new_fpstt;
1736
    new_fpstt = (env->fpstt - 1) & 7;
1737
#ifdef USE_FP_CONVERT
1738
    FP_CONVERT.i64 = ldq(A0);
1739
    env->fpregs[new_fpstt].d = FP_CONVERT.d;
1740
#else
1741
    env->fpregs[new_fpstt].d = ldfq(A0);
1742
#endif
1743
    env->fpstt = new_fpstt;
1744
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1745
}
1746

    
1747
void OPPROTO op_fldt_ST0_A0(void)
1748
{
1749
    helper_fldt_ST0_A0();
1750
}
1751

    
1752
/* helpers are needed to avoid static constant reference. XXX: find a better way */
1753
#ifdef USE_INT_TO_FLOAT_HELPERS
1754

    
1755
void helper_fild_ST0_A0(void)
1756
{
1757
    int new_fpstt;
1758
    new_fpstt = (env->fpstt - 1) & 7;
1759
    env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1760
    env->fpstt = new_fpstt;
1761
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1762
}
1763

    
1764
void helper_fildl_ST0_A0(void)
1765
{
1766
    int new_fpstt;
1767
    new_fpstt = (env->fpstt - 1) & 7;
1768
    env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1769
    env->fpstt = new_fpstt;
1770
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1771
}
1772

    
1773
void helper_fildll_ST0_A0(void)
1774
{
1775
    int new_fpstt;
1776
    new_fpstt = (env->fpstt - 1) & 7;
1777
    env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1778
    env->fpstt = new_fpstt;
1779
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1780
}
1781

    
1782
void OPPROTO op_fild_ST0_A0(void)
1783
{
1784
    helper_fild_ST0_A0();
1785
}
1786

    
1787
void OPPROTO op_fildl_ST0_A0(void)
1788
{
1789
    helper_fildl_ST0_A0();
1790
}
1791

    
1792
void OPPROTO op_fildll_ST0_A0(void)
1793
{
1794
    helper_fildll_ST0_A0();
1795
}
1796

    
1797
#else
1798

    
1799
void OPPROTO op_fild_ST0_A0(void)
1800
{
1801
    int new_fpstt;
1802
    new_fpstt = (env->fpstt - 1) & 7;
1803
#ifdef USE_FP_CONVERT
1804
    FP_CONVERT.i32 = ldsw(A0);
1805
    env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1806
#else
1807
    env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
1808
#endif
1809
    env->fpstt = new_fpstt;
1810
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1811
}
1812

    
1813
void OPPROTO op_fildl_ST0_A0(void)
1814
{
1815
    int new_fpstt;
1816
    new_fpstt = (env->fpstt - 1) & 7;
1817
#ifdef USE_FP_CONVERT
1818
    FP_CONVERT.i32 = (int32_t) ldl(A0);
1819
    env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
1820
#else
1821
    env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
1822
#endif
1823
    env->fpstt = new_fpstt;
1824
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1825
}
1826

    
1827
void OPPROTO op_fildll_ST0_A0(void)
1828
{
1829
    int new_fpstt;
1830
    new_fpstt = (env->fpstt - 1) & 7;
1831
#ifdef USE_FP_CONVERT
1832
    FP_CONVERT.i64 = (int64_t) ldq(A0);
1833
    env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
1834
#else
1835
    env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
1836
#endif
1837
    env->fpstt = new_fpstt;
1838
    env->fptags[new_fpstt] = 0; /* validate stack entry */
1839
}
1840

    
1841
#endif
1842

    
1843
/* fp store */
1844

    
1845
void OPPROTO op_fsts_ST0_A0(void)
1846
{
1847
#ifdef USE_FP_CONVERT
1848
    FP_CONVERT.f = (float)ST0;
1849
    stfl(A0, FP_CONVERT.f);
1850
#else
1851
    stfl(A0, (float)ST0);
1852
#endif
1853
    FORCE_RET();
1854
}
1855

    
1856
void OPPROTO op_fstl_ST0_A0(void)
1857
{
1858
    stfq(A0, (double)ST0);
1859
    FORCE_RET();
1860
}
1861

    
1862
void OPPROTO op_fstt_ST0_A0(void)
1863
{
1864
    helper_fstt_ST0_A0();
1865
}
1866

    
1867
void OPPROTO op_fist_ST0_A0(void)
1868
{
1869
#if defined(__sparc__) && !defined(__sparc_v9__)
1870
    register CPU86_LDouble d asm("o0");
1871
#else
1872
    CPU86_LDouble d;
1873
#endif
1874
    int val;
1875

    
1876
    d = ST0;
1877
    val = floatx_to_int32(d, &env->fp_status);
1878
    if (val != (int16_t)val)
1879
        val = -32768;
1880
    stw(A0, val);
1881
    FORCE_RET();
1882
}
1883

    
1884
void OPPROTO op_fistl_ST0_A0(void)
1885
{
1886
#if defined(__sparc__) && !defined(__sparc_v9__)
1887
    register CPU86_LDouble d asm("o0");
1888
#else
1889
    CPU86_LDouble d;
1890
#endif
1891
    int val;
1892

    
1893
    d = ST0;
1894
    val = floatx_to_int32(d, &env->fp_status);
1895
    stl(A0, val);
1896
    FORCE_RET();
1897
}
1898

    
1899
void OPPROTO op_fistll_ST0_A0(void)
1900
{
1901
#if defined(__sparc__) && !defined(__sparc_v9__)
1902
    register CPU86_LDouble d asm("o0");
1903
#else
1904
    CPU86_LDouble d;
1905
#endif
1906
    int64_t val;
1907

    
1908
    d = ST0;
1909
    val = floatx_to_int64(d, &env->fp_status);
1910
    stq(A0, val);
1911
    FORCE_RET();
1912
}
1913

    
1914
void OPPROTO op_fbld_ST0_A0(void)
1915
{
1916
    helper_fbld_ST0_A0();
1917
}
1918

    
1919
void OPPROTO op_fbst_ST0_A0(void)
1920
{
1921
    helper_fbst_ST0_A0();
1922
}
1923

    
1924
/* FPU move */
1925

    
1926
void OPPROTO op_fpush(void)
1927
{
1928
    fpush();
1929
}
1930

    
1931
void OPPROTO op_fpop(void)
1932
{
1933
    fpop();
1934
}
1935

    
1936
void OPPROTO op_fdecstp(void)
1937
{
1938
    env->fpstt = (env->fpstt - 1) & 7;
1939
    env->fpus &= (~0x4700);
1940
}
1941

    
1942
void OPPROTO op_fincstp(void)
1943
{
1944
    env->fpstt = (env->fpstt + 1) & 7;
1945
    env->fpus &= (~0x4700);
1946
}
1947

    
1948
void OPPROTO op_ffree_STN(void)
1949
{
1950
    env->fptags[(env->fpstt + PARAM1) & 7] = 1;
1951
}
1952

    
1953
void OPPROTO op_fmov_ST0_FT0(void)
1954
{
1955
    ST0 = FT0;
1956
}
1957

    
1958
void OPPROTO op_fmov_FT0_STN(void)
1959
{
1960
    FT0 = ST(PARAM1);
1961
}
1962

    
1963
void OPPROTO op_fmov_ST0_STN(void)
1964
{
1965
    ST0 = ST(PARAM1);
1966
}
1967

    
1968
void OPPROTO op_fmov_STN_ST0(void)
1969
{
1970
    ST(PARAM1) = ST0;
1971
}
1972

    
1973
void OPPROTO op_fxchg_ST0_STN(void)
1974
{
1975
    CPU86_LDouble tmp;
1976
    tmp = ST(PARAM1);
1977
    ST(PARAM1) = ST0;
1978
    ST0 = tmp;
1979
}
1980

    
1981
/* FPU operations */
1982

    
1983
const int fcom_ccval[4] = {0x0100, 0x4000, 0x0000, 0x4500};
1984

    
1985
void OPPROTO op_fcom_ST0_FT0(void)
1986
{
1987
    int ret;
1988

    
1989
    ret = floatx_compare(ST0, FT0, &env->fp_status);
1990
    env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
1991
    FORCE_RET();
1992
}
1993

    
1994
void OPPROTO op_fucom_ST0_FT0(void)
1995
{
1996
    int ret;
1997

    
1998
    ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
1999
    env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret+ 1];
2000
    FORCE_RET();
2001
}
2002

    
2003
const int fcomi_ccval[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
2004

    
2005
void OPPROTO op_fcomi_ST0_FT0(void)
2006
{
2007
    int eflags;
2008
    int ret;
2009

    
2010
    ret = floatx_compare(ST0, FT0, &env->fp_status);
2011
    eflags = cc_table[CC_OP].compute_all();
2012
    eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
2013
    CC_SRC = eflags;
2014
    FORCE_RET();
2015
}
2016

    
2017
void OPPROTO op_fucomi_ST0_FT0(void)
2018
{
2019
    int eflags;
2020
    int ret;
2021

    
2022
    ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
2023
    eflags = cc_table[CC_OP].compute_all();
2024
    eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
2025
    CC_SRC = eflags;
2026
    FORCE_RET();
2027
}
2028

    
2029
void OPPROTO op_fcmov_ST0_STN_T0(void)
2030
{
2031
    if (T0) {
2032
        ST0 = ST(PARAM1);
2033
    }
2034
    FORCE_RET();
2035
}
2036

    
2037
void OPPROTO op_fadd_ST0_FT0(void)
2038
{
2039
    ST0 += FT0;
2040
}
2041

    
2042
void OPPROTO op_fmul_ST0_FT0(void)
2043
{
2044
    ST0 *= FT0;
2045
}
2046

    
2047
void OPPROTO op_fsub_ST0_FT0(void)
2048
{
2049
    ST0 -= FT0;
2050
}
2051

    
2052
void OPPROTO op_fsubr_ST0_FT0(void)
2053
{
2054
    ST0 = FT0 - ST0;
2055
}
2056

    
2057
void OPPROTO op_fdiv_ST0_FT0(void)
2058
{
2059
    ST0 = helper_fdiv(ST0, FT0);
2060
}
2061

    
2062
void OPPROTO op_fdivr_ST0_FT0(void)
2063
{
2064
    ST0 = helper_fdiv(FT0, ST0);
2065
}
2066

    
2067
/* fp operations between STN and ST0 */
2068

    
2069
void OPPROTO op_fadd_STN_ST0(void)
2070
{
2071
    ST(PARAM1) += ST0;
2072
}
2073

    
2074
void OPPROTO op_fmul_STN_ST0(void)
2075
{
2076
    ST(PARAM1) *= ST0;
2077
}
2078

    
2079
void OPPROTO op_fsub_STN_ST0(void)
2080
{
2081
    ST(PARAM1) -= ST0;
2082
}
2083

    
2084
void OPPROTO op_fsubr_STN_ST0(void)
2085
{
2086
    CPU86_LDouble *p;
2087
    p = &ST(PARAM1);
2088
    *p = ST0 - *p;
2089
}
2090

    
2091
void OPPROTO op_fdiv_STN_ST0(void)
2092
{
2093
    CPU86_LDouble *p;
2094
    p = &ST(PARAM1);
2095
    *p = helper_fdiv(*p, ST0);
2096
}
2097

    
2098
void OPPROTO op_fdivr_STN_ST0(void)
2099
{
2100
    CPU86_LDouble *p;
2101
    p = &ST(PARAM1);
2102
    *p = helper_fdiv(ST0, *p);
2103
}
2104

    
2105
/* misc FPU operations */
2106
void OPPROTO op_fchs_ST0(void)
2107
{
2108
    ST0 = floatx_chs(ST0);
2109
}
2110

    
2111
void OPPROTO op_fabs_ST0(void)
2112
{
2113
    ST0 = floatx_abs(ST0);
2114
}
2115

    
2116
void OPPROTO op_fxam_ST0(void)
2117
{
2118
    helper_fxam_ST0();
2119
}
2120

    
2121
void OPPROTO op_fld1_ST0(void)
2122
{
2123
    ST0 = f15rk[1];
2124
}
2125

    
2126
void OPPROTO op_fldl2t_ST0(void)
2127
{
2128
    ST0 = f15rk[6];
2129
}
2130

    
2131
void OPPROTO op_fldl2e_ST0(void)
2132
{
2133
    ST0 = f15rk[5];
2134
}
2135

    
2136
void OPPROTO op_fldpi_ST0(void)
2137
{
2138
    ST0 = f15rk[2];
2139
}
2140

    
2141
void OPPROTO op_fldlg2_ST0(void)
2142
{
2143
    ST0 = f15rk[3];
2144
}
2145

    
2146
void OPPROTO op_fldln2_ST0(void)
2147
{
2148
    ST0 = f15rk[4];
2149
}
2150

    
2151
void OPPROTO op_fldz_ST0(void)
2152
{
2153
    ST0 = f15rk[0];
2154
}
2155

    
2156
void OPPROTO op_fldz_FT0(void)
2157
{
2158
    FT0 = f15rk[0];
2159
}
2160

    
2161
/* associated heplers to reduce generated code length and to simplify
2162
   relocation (FP constants are usually stored in .rodata section) */
2163

    
2164
void OPPROTO op_f2xm1(void)
2165
{
2166
    helper_f2xm1();
2167
}
2168

    
2169
void OPPROTO op_fyl2x(void)
2170
{
2171
    helper_fyl2x();
2172
}
2173

    
2174
void OPPROTO op_fptan(void)
2175
{
2176
    helper_fptan();
2177
}
2178

    
2179
void OPPROTO op_fpatan(void)
2180
{
2181
    helper_fpatan();
2182
}
2183

    
2184
void OPPROTO op_fxtract(void)
2185
{
2186
    helper_fxtract();
2187
}
2188

    
2189
void OPPROTO op_fprem1(void)
2190
{
2191
    helper_fprem1();
2192
}
2193

    
2194

    
2195
void OPPROTO op_fprem(void)
2196
{
2197
    helper_fprem();
2198
}
2199

    
2200
void OPPROTO op_fyl2xp1(void)
2201
{
2202
    helper_fyl2xp1();
2203
}
2204

    
2205
void OPPROTO op_fsqrt(void)
2206
{
2207
    helper_fsqrt();
2208
}
2209

    
2210
void OPPROTO op_fsincos(void)
2211
{
2212
    helper_fsincos();
2213
}
2214

    
2215
void OPPROTO op_frndint(void)
2216
{
2217
    helper_frndint();
2218
}
2219

    
2220
void OPPROTO op_fscale(void)
2221
{
2222
    helper_fscale();
2223
}
2224

    
2225
void OPPROTO op_fsin(void)
2226
{
2227
    helper_fsin();
2228
}
2229

    
2230
void OPPROTO op_fcos(void)
2231
{
2232
    helper_fcos();
2233
}
2234

    
2235
void OPPROTO op_fnstsw_A0(void)
2236
{
2237
    int fpus;
2238
    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2239
    stw(A0, fpus);
2240
    FORCE_RET();
2241
}
2242

    
2243
void OPPROTO op_fnstsw_EAX(void)
2244
{
2245
    int fpus;
2246
    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
2247
    EAX = (EAX & ~0xffff) | fpus;
2248
}
2249

    
2250
void OPPROTO op_fnstcw_A0(void)
2251
{
2252
    stw(A0, env->fpuc);
2253
    FORCE_RET();
2254
}
2255

    
2256
void OPPROTO op_fldcw_A0(void)
2257
{
2258
    env->fpuc = lduw(A0);
2259
    update_fp_status();
2260
}
2261

    
2262
void OPPROTO op_fclex(void)
2263
{
2264
    env->fpus &= 0x7f00;
2265
}
2266

    
2267
void OPPROTO op_fwait(void)
2268
{
2269
    if (env->fpus & FPUS_SE)
2270
        fpu_raise_exception();
2271
    FORCE_RET();
2272
}
2273

    
2274
void OPPROTO op_fninit(void)
2275
{
2276
    env->fpus = 0;
2277
    env->fpstt = 0;
2278
    env->fpuc = 0x37f;
2279
    env->fptags[0] = 1;
2280
    env->fptags[1] = 1;
2281
    env->fptags[2] = 1;
2282
    env->fptags[3] = 1;
2283
    env->fptags[4] = 1;
2284
    env->fptags[5] = 1;
2285
    env->fptags[6] = 1;
2286
    env->fptags[7] = 1;
2287
}
2288

    
2289
void OPPROTO op_fnstenv_A0(void)
2290
{
2291
    helper_fstenv(A0, PARAM1);
2292
}
2293

    
2294
void OPPROTO op_fldenv_A0(void)
2295
{
2296
    helper_fldenv(A0, PARAM1);
2297
}
2298

    
2299
void OPPROTO op_fnsave_A0(void)
2300
{
2301
    helper_fsave(A0, PARAM1);
2302
}
2303

    
2304
void OPPROTO op_frstor_A0(void)
2305
{
2306
    helper_frstor(A0, PARAM1);
2307
}
2308

    
2309
/* threading support */
2310
void OPPROTO op_lock(void)
2311
{
2312
    cpu_lock();
2313
}
2314

    
2315
void OPPROTO op_unlock(void)
2316
{
2317
    cpu_unlock();
2318
}
2319

    
2320
/* SSE support */
2321
static inline void memcpy16(void *d, void *s)
2322
{
2323
    ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2324
    ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2325
    ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2326
    ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2327
}
2328

    
2329
void OPPROTO op_movo(void)
2330
{
2331
    /* XXX: badly generated code */
2332
    XMMReg *d, *s;
2333
    d = (XMMReg *)((char *)env + PARAM1);
2334
    s = (XMMReg *)((char *)env + PARAM2);
2335
    memcpy16(d, s);
2336
}
2337

    
2338
void OPPROTO op_movq(void)
2339
{
2340
    uint64_t *d, *s;
2341
    d = (uint64_t *)((char *)env + PARAM1);
2342
    s = (uint64_t *)((char *)env + PARAM2);
2343
    *d = *s;
2344
}
2345

    
2346
void OPPROTO op_movl(void)
2347
{
2348
    uint32_t *d, *s;
2349
    d = (uint32_t *)((char *)env + PARAM1);
2350
    s = (uint32_t *)((char *)env + PARAM2);
2351
    *d = *s;
2352
}
2353

    
2354
void OPPROTO op_movq_env_0(void)
2355
{
2356
    uint64_t *d;
2357
    d = (uint64_t *)((char *)env + PARAM1);
2358
    *d = 0;
2359
}
2360

    
2361
void OPPROTO op_fxsave_A0(void)
2362
{
2363
    helper_fxsave(A0, PARAM1);
2364
}
2365

    
2366
void OPPROTO op_fxrstor_A0(void)
2367
{
2368
    helper_fxrstor(A0, PARAM1);
2369
}
2370

    
2371
/* XXX: optimize by storing fptt and fptags in the static cpu state */
2372
void OPPROTO op_enter_mmx(void)
2373
{
2374
    env->fpstt = 0;
2375
    *(uint32_t *)(env->fptags) = 0;
2376
    *(uint32_t *)(env->fptags + 4) = 0;
2377
}
2378

    
2379
void OPPROTO op_emms(void)
2380
{
2381
    /* set to empty state */
2382
    *(uint32_t *)(env->fptags) = 0x01010101;
2383
    *(uint32_t *)(env->fptags + 4) = 0x01010101;
2384
}
2385

    
2386
#define SHIFT 0
2387
#include "ops_sse.h"
2388

    
2389
#define SHIFT 1
2390
#include "ops_sse.h"