Revision 64a88d5d target-sparc/op_helper.c
| b/target-sparc/op_helper.c | ||
|---|---|---|
| 61 | 61 |
|
| 62 | 62 |
#define F_HELPER(name, p) void helper_f##name##p(void) |
| 63 | 63 |
|
| 64 |
#if defined(CONFIG_USER_ONLY) |
|
| 65 | 64 |
#define F_BINOP(name) \ |
| 66 | 65 |
F_HELPER(name, s) \ |
| 67 | 66 |
{ \
|
| ... | ... | |
| 75 | 74 |
{ \
|
| 76 | 75 |
QT0 = float128_ ## name (QT0, QT1, &env->fp_status); \ |
| 77 | 76 |
} |
| 78 |
#else |
|
| 79 |
#define F_BINOP(name) \ |
|
| 80 |
F_HELPER(name, s) \ |
|
| 81 |
{ \
|
|
| 82 |
FT0 = float32_ ## name (FT0, FT1, &env->fp_status); \ |
|
| 83 |
} \ |
|
| 84 |
F_HELPER(name, d) \ |
|
| 85 |
{ \
|
|
| 86 |
DT0 = float64_ ## name (DT0, DT1, &env->fp_status); \ |
|
| 87 |
} |
|
| 88 |
#endif |
|
| 89 | 77 |
|
| 90 | 78 |
F_BINOP(add); |
| 91 | 79 |
F_BINOP(sub); |
| ... | ... | |
| 100 | 88 |
&env->fp_status); |
| 101 | 89 |
} |
| 102 | 90 |
|
| 103 |
#if defined(CONFIG_USER_ONLY) |
|
| 104 | 91 |
void helper_fdmulq(void) |
| 105 | 92 |
{
|
| 106 | 93 |
QT0 = float128_mul(float64_to_float128(DT0, &env->fp_status), |
| 107 | 94 |
float64_to_float128(DT1, &env->fp_status), |
| 108 | 95 |
&env->fp_status); |
| 109 | 96 |
} |
| 110 |
#endif |
|
| 111 | 97 |
|
| 112 | 98 |
F_HELPER(neg, s) |
| 113 | 99 |
{
|
| ... | ... | |
| 120 | 106 |
DT0 = float64_chs(DT1); |
| 121 | 107 |
} |
| 122 | 108 |
|
| 123 |
#if defined(CONFIG_USER_ONLY) |
|
| 124 | 109 |
F_HELPER(neg, q) |
| 125 | 110 |
{
|
| 126 | 111 |
QT0 = float128_chs(QT1); |
| 127 | 112 |
} |
| 128 | 113 |
#endif |
| 129 |
#endif |
|
| 130 | 114 |
|
| 131 | 115 |
/* Integer to float conversion. */ |
| 132 | 116 |
F_HELPER(ito, s) |
| ... | ... | |
| 139 | 123 |
DT0 = int32_to_float64(*((int32_t *)&FT1), &env->fp_status); |
| 140 | 124 |
} |
| 141 | 125 |
|
| 142 |
#if defined(CONFIG_USER_ONLY) |
|
| 143 | 126 |
F_HELPER(ito, q) |
| 144 | 127 |
{
|
| 145 | 128 |
QT0 = int32_to_float128(*((int32_t *)&FT1), &env->fp_status); |
| 146 | 129 |
} |
| 147 |
#endif |
|
| 148 | 130 |
|
| 149 | 131 |
#ifdef TARGET_SPARC64 |
| 150 | 132 |
F_HELPER(xto, s) |
| ... | ... | |
| 156 | 138 |
{
|
| 157 | 139 |
DT0 = int64_to_float64(*((int64_t *)&DT1), &env->fp_status); |
| 158 | 140 |
} |
| 159 |
#if defined(CONFIG_USER_ONLY) |
|
| 141 |
|
|
| 160 | 142 |
F_HELPER(xto, q) |
| 161 | 143 |
{
|
| 162 | 144 |
QT0 = int64_to_float128(*((int64_t *)&DT1), &env->fp_status); |
| 163 | 145 |
} |
| 164 | 146 |
#endif |
| 165 |
#endif |
|
| 166 | 147 |
#undef F_HELPER |
| 167 | 148 |
|
| 168 | 149 |
/* floating point conversion */ |
| ... | ... | |
| 176 | 157 |
DT0 = float32_to_float64(FT1, &env->fp_status); |
| 177 | 158 |
} |
| 178 | 159 |
|
| 179 |
#if defined(CONFIG_USER_ONLY) |
|
| 180 | 160 |
void helper_fqtos(void) |
| 181 | 161 |
{
|
| 182 | 162 |
FT0 = float128_to_float32(QT1, &env->fp_status); |
| ... | ... | |
| 196 | 176 |
{
|
| 197 | 177 |
QT0 = float64_to_float128(DT1, &env->fp_status); |
| 198 | 178 |
} |
| 199 |
#endif |
|
| 200 | 179 |
|
| 201 | 180 |
/* Float to integer conversion. */ |
| 202 | 181 |
void helper_fstoi(void) |
| ... | ... | |
| 209 | 188 |
*((int32_t *)&FT0) = float64_to_int32_round_to_zero(DT1, &env->fp_status); |
| 210 | 189 |
} |
| 211 | 190 |
|
| 212 |
#if defined(CONFIG_USER_ONLY) |
|
| 213 | 191 |
void helper_fqtoi(void) |
| 214 | 192 |
{
|
| 215 | 193 |
*((int32_t *)&FT0) = float128_to_int32_round_to_zero(QT1, &env->fp_status); |
| 216 | 194 |
} |
| 217 |
#endif |
|
| 218 | 195 |
|
| 219 | 196 |
#ifdef TARGET_SPARC64 |
| 220 | 197 |
void helper_fstox(void) |
| ... | ... | |
| 227 | 204 |
*((int64_t *)&DT0) = float64_to_int64_round_to_zero(DT1, &env->fp_status); |
| 228 | 205 |
} |
| 229 | 206 |
|
| 230 |
#if defined(CONFIG_USER_ONLY) |
|
| 231 | 207 |
void helper_fqtox(void) |
| 232 | 208 |
{
|
| 233 | 209 |
*((int64_t *)&DT0) = float128_to_int64_round_to_zero(QT1, &env->fp_status); |
| 234 | 210 |
} |
| 235 |
#endif |
|
| 236 | 211 |
|
| 237 | 212 |
void helper_faligndata(void) |
| 238 | 213 |
{
|
| ... | ... | |
| 722 | 697 |
DT0 = float64_abs(DT1); |
| 723 | 698 |
} |
| 724 | 699 |
|
| 725 |
#if defined(CONFIG_USER_ONLY) |
|
| 726 | 700 |
void helper_fabsq(void) |
| 727 | 701 |
{
|
| 728 | 702 |
QT0 = float128_abs(QT1); |
| 729 | 703 |
} |
| 730 | 704 |
#endif |
| 731 |
#endif |
|
| 732 | 705 |
|
| 733 | 706 |
void helper_fsqrts(void) |
| 734 | 707 |
{
|
| ... | ... | |
| 740 | 713 |
DT0 = float64_sqrt(DT1, &env->fp_status); |
| 741 | 714 |
} |
| 742 | 715 |
|
| 743 |
#if defined(CONFIG_USER_ONLY) |
|
| 744 | 716 |
void helper_fsqrtq(void) |
| 745 | 717 |
{
|
| 746 | 718 |
QT0 = float128_sqrt(QT1, &env->fp_status); |
| 747 | 719 |
} |
| 748 |
#endif |
|
| 749 | 720 |
|
| 750 | 721 |
#define GEN_FCMP(name, size, reg1, reg2, FS, TRAP) \ |
| 751 | 722 |
void glue(helper_, name) (void) \ |
| ... | ... | |
| 784 | 755 |
GEN_FCMP(fcmpes, float32, FT0, FT1, 0, 1); |
| 785 | 756 |
GEN_FCMP(fcmped, float64, DT0, DT1, 0, 1); |
| 786 | 757 |
|
| 787 |
#ifdef CONFIG_USER_ONLY |
|
| 788 | 758 |
GEN_FCMP(fcmpq, float128, QT0, QT1, 0, 0); |
| 789 | 759 |
GEN_FCMP(fcmpeq, float128, QT0, QT1, 0, 1); |
| 790 |
#endif |
|
| 791 | 760 |
|
| 792 | 761 |
#ifdef TARGET_SPARC64 |
| 793 | 762 |
GEN_FCMP(fcmps_fcc1, float32, FT0, FT1, 22, 0); |
| 794 | 763 |
GEN_FCMP(fcmpd_fcc1, float64, DT0, DT1, 22, 0); |
| 764 |
GEN_FCMP(fcmpq_fcc1, float128, QT0, QT1, 22, 0); |
|
| 795 | 765 |
|
| 796 | 766 |
GEN_FCMP(fcmps_fcc2, float32, FT0, FT1, 24, 0); |
| 797 | 767 |
GEN_FCMP(fcmpd_fcc2, float64, DT0, DT1, 24, 0); |
| 768 |
GEN_FCMP(fcmpq_fcc2, float128, QT0, QT1, 24, 0); |
|
| 798 | 769 |
|
| 799 | 770 |
GEN_FCMP(fcmps_fcc3, float32, FT0, FT1, 26, 0); |
| 800 | 771 |
GEN_FCMP(fcmpd_fcc3, float64, DT0, DT1, 26, 0); |
| 772 |
GEN_FCMP(fcmpq_fcc3, float128, QT0, QT1, 26, 0); |
|
| 801 | 773 |
|
| 802 | 774 |
GEN_FCMP(fcmpes_fcc1, float32, FT0, FT1, 22, 1); |
| 803 | 775 |
GEN_FCMP(fcmped_fcc1, float64, DT0, DT1, 22, 1); |
| 776 |
GEN_FCMP(fcmpeq_fcc1, float128, QT0, QT1, 22, 1); |
|
| 804 | 777 |
|
| 805 | 778 |
GEN_FCMP(fcmpes_fcc2, float32, FT0, FT1, 24, 1); |
| 806 | 779 |
GEN_FCMP(fcmped_fcc2, float64, DT0, DT1, 24, 1); |
| 780 |
GEN_FCMP(fcmpeq_fcc2, float128, QT0, QT1, 24, 1); |
|
| 807 | 781 |
|
| 808 | 782 |
GEN_FCMP(fcmpes_fcc3, float32, FT0, FT1, 26, 1); |
| 809 | 783 |
GEN_FCMP(fcmped_fcc3, float64, DT0, DT1, 26, 1); |
| 810 |
#ifdef CONFIG_USER_ONLY |
|
| 811 |
GEN_FCMP(fcmpq_fcc1, float128, QT0, QT1, 22, 0); |
|
| 812 |
GEN_FCMP(fcmpq_fcc2, float128, QT0, QT1, 24, 0); |
|
| 813 |
GEN_FCMP(fcmpq_fcc3, float128, QT0, QT1, 26, 0); |
|
| 814 |
GEN_FCMP(fcmpeq_fcc1, float128, QT0, QT1, 22, 1); |
|
| 815 |
GEN_FCMP(fcmpeq_fcc2, float128, QT0, QT1, 24, 1); |
|
| 816 | 784 |
GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1); |
| 817 | 785 |
#endif |
| 818 |
#endif |
|
| 819 | 786 |
|
| 820 | 787 |
#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) && defined(DEBUG_MXCC) |
| 821 | 788 |
static void dump_mxcc(CPUState *env) |
| ... | ... | |
| 2074 | 2041 |
case 8: |
| 2075 | 2042 |
*((int64_t *)&DT0) = val; |
| 2076 | 2043 |
break; |
| 2077 |
#if defined(CONFIG_USER_ONLY) |
|
| 2078 | 2044 |
case 16: |
| 2079 | 2045 |
// XXX |
| 2080 | 2046 |
break; |
| 2081 |
#endif |
|
| 2082 | 2047 |
} |
| 2083 | 2048 |
} |
| 2084 | 2049 |
|
| ... | ... | |
| 2119 | 2084 |
case 8: |
| 2120 | 2085 |
val = *((int64_t *)&DT0); |
| 2121 | 2086 |
break; |
| 2122 |
#if defined(CONFIG_USER_ONLY) |
|
| 2123 | 2087 |
case 16: |
| 2124 | 2088 |
// XXX |
| 2125 | 2089 |
break; |
| 2126 |
#endif |
|
| 2127 | 2090 |
} |
| 2128 | 2091 |
helper_st_asi(addr, val, asi, size); |
| 2129 | 2092 |
} |
| ... | ... | |
| 2299 | 2262 |
#endif |
| 2300 | 2263 |
} |
| 2301 | 2264 |
|
| 2302 |
#if defined(CONFIG_USER_ONLY) |
|
| 2303 |
void helper_ldqf(target_ulong addr) |
|
| 2265 |
void helper_ldqf(target_ulong addr, int mem_idx) |
|
| 2304 | 2266 |
{
|
| 2305 | 2267 |
// XXX add 128 bit load |
| 2306 | 2268 |
CPU_QuadU u; |
| 2307 | 2269 |
|
| 2270 |
#if !defined(CONFIG_USER_ONLY) |
|
| 2271 |
switch (mem_idx) {
|
|
| 2272 |
case 0: |
|
| 2273 |
u.ll.upper = ldq_user(ADDR(addr)); |
|
| 2274 |
u.ll.lower = ldq_user(ADDR(addr + 8)); |
|
| 2275 |
QT0 = u.q; |
|
| 2276 |
break; |
|
| 2277 |
case 1: |
|
| 2278 |
u.ll.upper = ldq_kernel(ADDR(addr)); |
|
| 2279 |
u.ll.lower = ldq_kernel(ADDR(addr + 8)); |
|
| 2280 |
QT0 = u.q; |
|
| 2281 |
break; |
|
| 2282 |
#ifdef TARGET_SPARC64 |
|
| 2283 |
case 2: |
|
| 2284 |
u.ll.upper = ldq_hypv(ADDR(addr)); |
|
| 2285 |
u.ll.lower = ldq_hypv(ADDR(addr + 8)); |
|
| 2286 |
QT0 = u.q; |
|
| 2287 |
break; |
|
| 2288 |
#endif |
|
| 2289 |
default: |
|
| 2290 |
break; |
|
| 2291 |
} |
|
| 2292 |
#else |
|
| 2308 | 2293 |
u.ll.upper = ldq_raw(ADDR(addr)); |
| 2309 | 2294 |
u.ll.lower = ldq_raw(ADDR(addr + 8)); |
| 2310 | 2295 |
QT0 = u.q; |
| 2296 |
#endif |
|
| 2311 | 2297 |
} |
| 2312 | 2298 |
|
| 2313 |
void helper_stqf(target_ulong addr) |
|
| 2299 |
void helper_stqf(target_ulong addr, int mem_idx)
|
|
| 2314 | 2300 |
{
|
| 2315 | 2301 |
// XXX add 128 bit store |
| 2316 | 2302 |
CPU_QuadU u; |
| 2317 | 2303 |
|
| 2304 |
#if !defined(CONFIG_USER_ONLY) |
|
| 2305 |
switch (mem_idx) {
|
|
| 2306 |
case 0: |
|
| 2307 |
u.q = QT0; |
|
| 2308 |
stq_user(ADDR(addr), u.ll.upper); |
|
| 2309 |
stq_user(ADDR(addr + 8), u.ll.lower); |
|
| 2310 |
break; |
|
| 2311 |
case 1: |
|
| 2312 |
u.q = QT0; |
|
| 2313 |
stq_kernel(ADDR(addr), u.ll.upper); |
|
| 2314 |
stq_kernel(ADDR(addr + 8), u.ll.lower); |
|
| 2315 |
break; |
|
| 2316 |
#ifdef TARGET_SPARC64 |
|
| 2317 |
case 2: |
|
| 2318 |
u.q = QT0; |
|
| 2319 |
stq_hypv(ADDR(addr), u.ll.upper); |
|
| 2320 |
stq_hypv(ADDR(addr + 8), u.ll.lower); |
|
| 2321 |
break; |
|
| 2322 |
#endif |
|
| 2323 |
default: |
|
| 2324 |
break; |
|
| 2325 |
} |
|
| 2326 |
#else |
|
| 2318 | 2327 |
u.q = QT0; |
| 2319 | 2328 |
stq_raw(ADDR(addr), u.ll.upper); |
| 2320 | 2329 |
stq_raw(ADDR(addr + 8), u.ll.lower); |
| 2321 |
} |
|
| 2322 | 2330 |
#endif |
| 2331 |
} |
|
| 2323 | 2332 |
|
| 2324 | 2333 |
#undef ADDR |
| 2325 | 2334 |
|
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