Revision 664a65b0

b/target-sparc/op_helper.c
2959 2959
                break;
2960 2960
            case 1: // Primary context
2961 2961
                env->dmmu.mmu_primary_context = val;
2962
                /* can be optimized to only flush MMU_USER_IDX
2963
                   and MMU_KERNEL_IDX entries */
2964
                tlb_flush(env, 1);
2962 2965
                break;
2963 2966
            case 2: // Secondary context
2964 2967
                env->dmmu.mmu_secondary_context = val;
2968
                /* can be optimized to only flush MMU_USER_SECONDARY_IDX
2969
                   and MMU_KERNEL_SECONDARY_IDX entries */
2970
                tlb_flush(env, 1);
2965 2971
                break;
2966 2972
            case 5: // TSB access
2967 2973
                DPRINTF_MMU("dmmu TSB write: 0x%016" PRIx64 " -> 0x%016"

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