Revision 666c87aa target-sparc/op_helper.c
b/target-sparc/op_helper.c | ||
---|---|---|
411 | 411 |
break; |
412 | 412 |
} |
413 | 413 |
break; |
414 |
case 0x39: /* data cache diagnostic register */ |
|
415 |
ret = 0; |
|
416 |
break; |
|
414 | 417 |
case 0x21 ... 0x2d: /* MMU passthrough, unassigned */ |
415 | 418 |
default: |
416 | 419 |
do_unassigned_access(T0, 0, 0, 1); |
... | ... | |
703 | 706 |
} |
704 | 707 |
} |
705 | 708 |
return; |
706 |
case 0x31: /* Ross RT620 I-cache flush */ |
|
709 |
case 0x30: /* store buffer tags */ |
|
710 |
case 0x31: /* store buffer data or Ross RT620 I-cache flush */ |
|
711 |
case 0x32: /* store buffer control */ |
|
707 | 712 |
case 0x36: /* I-cache flash clear */ |
708 | 713 |
case 0x37: /* D-cache flash clear */ |
714 |
case 0x38: /* breakpoint diagnostics */ |
|
715 |
case 0x4c: /* breakpoint action */ |
|
709 | 716 |
break; |
710 | 717 |
case 9: /* Supervisor code access, XXX */ |
711 | 718 |
case 0x21 ... 0x2d: /* MMU passthrough, unassigned */ |
Also available in: Unified diff