Revision 67867308 Changelog
b/Changelog | ||
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9 | 9 |
- IRET and INT fixes in VM86 mode with IOPL=3 |
10 | 10 |
- Port I/Os use TSS io map |
11 | 11 |
- Full task switching/task gate support |
12 |
- added verr, verw, arpl |
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12 |
- added verr, verw, arpl, fcmovxx |
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13 |
- PowerPC target support (Jocelyn Mayer) |
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13 | 14 |
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14 | 15 |
version 0.5.0: |
15 | 16 |
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