Revision 686f3f26
| b/target-i386/ops_template.h | ||
|---|---|---|
| 513 | 513 |
count++; |
| 514 | 514 |
res >>= 1; |
| 515 | 515 |
} |
| 516 |
T0 = count;
|
|
| 516 |
T1 = count;
|
|
| 517 | 517 |
CC_DST = 1; /* ZF = 0 */ |
| 518 | 518 |
} else {
|
| 519 | 519 |
CC_DST = 0; /* ZF = 1 */ |
| ... | ... | |
| 531 | 531 |
count--; |
| 532 | 532 |
res <<= 1; |
| 533 | 533 |
} |
| 534 |
T0 = count;
|
|
| 534 |
T1 = count;
|
|
| 535 | 535 |
CC_DST = 1; /* ZF = 0 */ |
| 536 | 536 |
} else {
|
| 537 | 537 |
CC_DST = 0; /* ZF = 1 */ |
| b/target-i386/translate.c | ||
|---|---|---|
| 3708 | 3708 |
modrm = ldub_code(s->pc++); |
| 3709 | 3709 |
reg = (modrm >> 3) & 7; |
| 3710 | 3710 |
gen_ldst_modrm(s, modrm, ot, OR_TMP0, 0); |
| 3711 |
/* NOTE: in order to handle the 0 case, we must load the |
|
| 3712 |
result. It could be optimized with a generated jump */ |
|
| 3713 |
gen_op_mov_TN_reg[ot][1][reg](); |
|
| 3711 | 3714 |
gen_op_bsx_T0_cc[ot - OT_WORD][b & 1](); |
| 3712 |
/* NOTE: we always write back the result. Intel doc says it is |
|
| 3713 |
undefined if T0 == 0 */ |
|
| 3714 |
gen_op_mov_reg_T0[ot][reg](); |
|
| 3715 |
gen_op_mov_reg_T1[ot][reg](); |
|
| 3715 | 3716 |
s->cc_op = CC_OP_LOGICB + ot; |
| 3716 | 3717 |
break; |
| 3717 | 3718 |
/************************/ |
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