Statistics
| Branch: | Revision:

root / target-i386 / exec.h @ 68cae3d8

History | View | Annotate | Download (13.6 kB)

1
/*
2
 *  i386 execution defines 
3
 *
4
 *  Copyright (c) 2003 Fabrice Bellard
5
 *
6
 * This library is free software; you can redistribute it and/or
7
 * modify it under the terms of the GNU Lesser General Public
8
 * License as published by the Free Software Foundation; either
9
 * version 2 of the License, or (at your option) any later version.
10
 *
11
 * This library is distributed in the hope that it will be useful,
12
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14
 * Lesser General Public License for more details.
15
 *
16
 * You should have received a copy of the GNU Lesser General Public
17
 * License along with this library; if not, write to the Free Software
18
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19
 */
20
#include "config.h"
21
#include "dyngen-exec.h"
22

    
23
/* XXX: factorize this mess */
24
#ifdef TARGET_X86_64
25
#define TARGET_LONG_BITS 64
26
#else
27
#define TARGET_LONG_BITS 32
28
#endif
29

    
30
#include "cpu-defs.h"
31

    
32
/* at least 4 register variables are defined */
33
register struct CPUX86State *env asm(AREG0);
34

    
35
#if TARGET_LONG_BITS > HOST_LONG_BITS
36

    
37
/* no registers can be used */
38
#define T0 (env->t0)
39
#define T1 (env->t1)
40
#define T2 (env->t2)
41

    
42
#else
43

    
44
/* XXX: use unsigned long instead of target_ulong - better code will
45
   be generated for 64 bit CPUs */
46
register target_ulong T0 asm(AREG1);
47
register target_ulong T1 asm(AREG2);
48
register target_ulong T2 asm(AREG3);
49

    
50
/* if more registers are available, we define some registers too */
51
#ifdef AREG4
52
register target_ulong EAX asm(AREG4);
53
#define reg_EAX
54
#endif
55

    
56
#ifdef AREG5
57
register target_ulong ESP asm(AREG5);
58
#define reg_ESP
59
#endif
60

    
61
#ifdef AREG6
62
register target_ulong EBP asm(AREG6);
63
#define reg_EBP
64
#endif
65

    
66
#ifdef AREG7
67
register target_ulong ECX asm(AREG7);
68
#define reg_ECX
69
#endif
70

    
71
#ifdef AREG8
72
register target_ulong EDX asm(AREG8);
73
#define reg_EDX
74
#endif
75

    
76
#ifdef AREG9
77
register target_ulong EBX asm(AREG9);
78
#define reg_EBX
79
#endif
80

    
81
#ifdef AREG10
82
register target_ulong ESI asm(AREG10);
83
#define reg_ESI
84
#endif
85

    
86
#ifdef AREG11
87
register target_ulong EDI asm(AREG11);
88
#define reg_EDI
89
#endif
90

    
91
#endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
92

    
93
#define A0 T2
94

    
95
extern FILE *logfile;
96
extern int loglevel;
97

    
98
#ifndef reg_EAX
99
#define EAX (env->regs[R_EAX])
100
#endif
101
#ifndef reg_ECX
102
#define ECX (env->regs[R_ECX])
103
#endif
104
#ifndef reg_EDX
105
#define EDX (env->regs[R_EDX])
106
#endif
107
#ifndef reg_EBX
108
#define EBX (env->regs[R_EBX])
109
#endif
110
#ifndef reg_ESP
111
#define ESP (env->regs[R_ESP])
112
#endif
113
#ifndef reg_EBP
114
#define EBP (env->regs[R_EBP])
115
#endif
116
#ifndef reg_ESI
117
#define ESI (env->regs[R_ESI])
118
#endif
119
#ifndef reg_EDI
120
#define EDI (env->regs[R_EDI])
121
#endif
122
#define EIP  (env->eip)
123
#define DF  (env->df)
124

    
125
#define CC_SRC (env->cc_src)
126
#define CC_DST (env->cc_dst)
127
#define CC_OP  (env->cc_op)
128

    
129
/* float macros */
130
#define FT0    (env->ft0)
131
#define ST0    (env->fpregs[env->fpstt].d)
132
#define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
133
#define ST1    ST(1)
134

    
135
#ifdef USE_FP_CONVERT
136
#define FP_CONVERT  (env->fp_convert)
137
#endif
138

    
139
#include "cpu.h"
140
#include "exec-all.h"
141

    
142
typedef struct CCTable {
143
    int (*compute_all)(void); /* return all the flags */
144
    int (*compute_c)(void);  /* return the C flag */
145
} CCTable;
146

    
147
extern CCTable cc_table[];
148

    
149
void load_seg(int seg_reg, int selector);
150
void helper_ljmp_protected_T0_T1(int next_eip);
151
void helper_lcall_real_T0_T1(int shift, int next_eip);
152
void helper_lcall_protected_T0_T1(int shift, int next_eip);
153
void helper_iret_real(int shift);
154
void helper_iret_protected(int shift, int next_eip);
155
void helper_lret_protected(int shift, int addend);
156
void helper_lldt_T0(void);
157
void helper_ltr_T0(void);
158
void helper_movl_crN_T0(int reg);
159
void helper_movl_drN_T0(int reg);
160
void helper_invlpg(target_ulong addr);
161
void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
162
void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
163
void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
164
void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr);
165
int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, 
166
                             int is_write, int is_user, int is_softmmu);
167
void tlb_fill(target_ulong addr, int is_write, int is_user, 
168
              void *retaddr);
169
void __hidden cpu_lock(void);
170
void __hidden cpu_unlock(void);
171
void do_interrupt(int intno, int is_int, int error_code, 
172
                  target_ulong next_eip, int is_hw);
173
void do_interrupt_user(int intno, int is_int, int error_code, 
174
                       target_ulong next_eip);
175
void raise_interrupt(int intno, int is_int, int error_code, 
176
                     int next_eip_addend);
177
void raise_exception_err(int exception_index, int error_code);
178
void raise_exception(int exception_index);
179
void __hidden cpu_loop_exit(void);
180

    
181
void OPPROTO op_movl_eflags_T0(void);
182
void OPPROTO op_movl_T0_eflags(void);
183
void helper_divl_EAX_T0(void);
184
void helper_idivl_EAX_T0(void);
185
void helper_mulq_EAX_T0(void);
186
void helper_imulq_EAX_T0(void);
187
void helper_imulq_T0_T1(void);
188
void helper_divq_EAX_T0(void);
189
void helper_idivq_EAX_T0(void);
190
void helper_bswapq_T0(void);
191
void helper_cmpxchg8b(void);
192
void helper_cpuid(void);
193
void helper_enter_level(int level, int data32);
194
void helper_enter64_level(int level, int data64);
195
void helper_sysenter(void);
196
void helper_sysexit(void);
197
void helper_syscall(int next_eip_addend);
198
void helper_sysret(int dflag);
199
void helper_rdtsc(void);
200
void helper_rdmsr(void);
201
void helper_wrmsr(void);
202
void helper_lsl(void);
203
void helper_lar(void);
204
void helper_verr(void);
205
void helper_verw(void);
206

    
207
void check_iob_T0(void);
208
void check_iow_T0(void);
209
void check_iol_T0(void);
210
void check_iob_DX(void);
211
void check_iow_DX(void);
212
void check_iol_DX(void);
213

    
214
#if !defined(CONFIG_USER_ONLY)
215

    
216
#include "softmmu_exec.h"
217

    
218
static inline double ldfq(target_ulong ptr)
219
{
220
    union {
221
        double d;
222
        uint64_t i;
223
    } u;
224
    u.i = ldq(ptr);
225
    return u.d;
226
}
227

    
228
static inline void stfq(target_ulong ptr, double v)
229
{
230
    union {
231
        double d;
232
        uint64_t i;
233
    } u;
234
    u.d = v;
235
    stq(ptr, u.i);
236
}
237

    
238
static inline float ldfl(target_ulong ptr)
239
{
240
    union {
241
        float f;
242
        uint32_t i;
243
    } u;
244
    u.i = ldl(ptr);
245
    return u.f;
246
}
247

    
248
static inline void stfl(target_ulong ptr, float v)
249
{
250
    union {
251
        float f;
252
        uint32_t i;
253
    } u;
254
    u.f = v;
255
    stl(ptr, u.i);
256
}
257

    
258
#endif /* !defined(CONFIG_USER_ONLY) */
259

    
260
#ifdef USE_X86LDOUBLE
261
/* use long double functions */
262
#define floatx_to_int32 floatx80_to_int32
263
#define floatx_to_int64 floatx80_to_int64
264
#define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
265
#define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
266
#define floatx_abs floatx80_abs
267
#define floatx_chs floatx80_chs
268
#define floatx_round_to_int floatx80_round_to_int
269
#define floatx_compare floatx80_compare
270
#define floatx_compare_quiet floatx80_compare_quiet
271
#define sin sinl
272
#define cos cosl
273
#define sqrt sqrtl
274
#define pow powl
275
#define log logl
276
#define tan tanl
277
#define atan2 atan2l
278
#define floor floorl
279
#define ceil ceill
280
#define ldexp ldexpl
281
#else
282
#define floatx_to_int32 float64_to_int32
283
#define floatx_to_int64 float64_to_int64
284
#define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
285
#define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
286
#define floatx_abs float64_abs
287
#define floatx_chs float64_chs
288
#define floatx_round_to_int float64_round_to_int
289
#define floatx_compare float64_compare
290
#define floatx_compare_quiet float64_compare_quiet
291
#endif
292

    
293
extern CPU86_LDouble sin(CPU86_LDouble x);
294
extern CPU86_LDouble cos(CPU86_LDouble x);
295
extern CPU86_LDouble sqrt(CPU86_LDouble x);
296
extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
297
extern CPU86_LDouble log(CPU86_LDouble x);
298
extern CPU86_LDouble tan(CPU86_LDouble x);
299
extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
300
extern CPU86_LDouble floor(CPU86_LDouble x);
301
extern CPU86_LDouble ceil(CPU86_LDouble x);
302

    
303
#define RC_MASK         0xc00
304
#define RC_NEAR                0x000
305
#define RC_DOWN                0x400
306
#define RC_UP                0x800
307
#define RC_CHOP                0xc00
308

    
309
#define MAXTAN 9223372036854775808.0
310

    
311
#ifdef USE_X86LDOUBLE
312

    
313
/* only for x86 */
314
typedef union {
315
    long double d;
316
    struct {
317
        unsigned long long lower;
318
        unsigned short upper;
319
    } l;
320
} CPU86_LDoubleU;
321

    
322
/* the following deal with x86 long double-precision numbers */
323
#define MAXEXPD 0x7fff
324
#define EXPBIAS 16383
325
#define EXPD(fp)        (fp.l.upper & 0x7fff)
326
#define SIGND(fp)        ((fp.l.upper) & 0x8000)
327
#define MANTD(fp)       (fp.l.lower)
328
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
329

    
330
#else
331

    
332
/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
333
typedef union {
334
    double d;
335
#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
336
    struct {
337
        uint32_t lower;
338
        int32_t upper;
339
    } l;
340
#else
341
    struct {
342
        int32_t upper;
343
        uint32_t lower;
344
    } l;
345
#endif
346
#ifndef __arm__
347
    int64_t ll;
348
#endif
349
} CPU86_LDoubleU;
350

    
351
/* the following deal with IEEE double-precision numbers */
352
#define MAXEXPD 0x7ff
353
#define EXPBIAS 1023
354
#define EXPD(fp)        (((fp.l.upper) >> 20) & 0x7FF)
355
#define SIGND(fp)        ((fp.l.upper) & 0x80000000)
356
#ifdef __arm__
357
#define MANTD(fp)        (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
358
#else
359
#define MANTD(fp)        (fp.ll & ((1LL << 52) - 1))
360
#endif
361
#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
362
#endif
363

    
364
static inline void fpush(void)
365
{
366
    env->fpstt = (env->fpstt - 1) & 7;
367
    env->fptags[env->fpstt] = 0; /* validate stack entry */
368
}
369

    
370
static inline void fpop(void)
371
{
372
    env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
373
    env->fpstt = (env->fpstt + 1) & 7;
374
}
375

    
376
#ifndef USE_X86LDOUBLE
377
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
378
{
379
    CPU86_LDoubleU temp;
380
    int upper, e;
381
    uint64_t ll;
382

    
383
    /* mantissa */
384
    upper = lduw(ptr + 8);
385
    /* XXX: handle overflow ? */
386
    e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
387
    e |= (upper >> 4) & 0x800; /* sign */
388
    ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
389
#ifdef __arm__
390
    temp.l.upper = (e << 20) | (ll >> 32);
391
    temp.l.lower = ll;
392
#else
393
    temp.ll = ll | ((uint64_t)e << 52);
394
#endif
395
    return temp.d;
396
}
397

    
398
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
399
{
400
    CPU86_LDoubleU temp;
401
    int e;
402

    
403
    temp.d = f;
404
    /* mantissa */
405
    stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
406
    /* exponent + sign */
407
    e = EXPD(temp) - EXPBIAS + 16383;
408
    e |= SIGND(temp) >> 16;
409
    stw(ptr + 8, e);
410
}
411
#else
412

    
413
/* XXX: same endianness assumed */
414

    
415
#ifdef CONFIG_USER_ONLY
416

    
417
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
418
{
419
    return *(CPU86_LDouble *)ptr;
420
}
421

    
422
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
423
{
424
    *(CPU86_LDouble *)ptr = f;
425
}
426

    
427
#else
428

    
429
/* we use memory access macros */
430

    
431
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
432
{
433
    CPU86_LDoubleU temp;
434

    
435
    temp.l.lower = ldq(ptr);
436
    temp.l.upper = lduw(ptr + 8);
437
    return temp.d;
438
}
439

    
440
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
441
{
442
    CPU86_LDoubleU temp;
443
    
444
    temp.d = f;
445
    stq(ptr, temp.l.lower);
446
    stw(ptr + 8, temp.l.upper);
447
}
448

    
449
#endif /* !CONFIG_USER_ONLY */
450

    
451
#endif /* USE_X86LDOUBLE */
452

    
453
#define FPUS_IE (1 << 0)
454
#define FPUS_DE (1 << 1)
455
#define FPUS_ZE (1 << 2)
456
#define FPUS_OE (1 << 3)
457
#define FPUS_UE (1 << 4)
458
#define FPUS_PE (1 << 5)
459
#define FPUS_SF (1 << 6)
460
#define FPUS_SE (1 << 7)
461
#define FPUS_B  (1 << 15)
462

    
463
#define FPUC_EM 0x3f
464

    
465
extern const CPU86_LDouble f15rk[7];
466

    
467
void helper_fldt_ST0_A0(void);
468
void helper_fstt_ST0_A0(void);
469
void fpu_raise_exception(void);
470
CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
471
void helper_fbld_ST0_A0(void);
472
void helper_fbst_ST0_A0(void);
473
void helper_f2xm1(void);
474
void helper_fyl2x(void);
475
void helper_fptan(void);
476
void helper_fpatan(void);
477
void helper_fxtract(void);
478
void helper_fprem1(void);
479
void helper_fprem(void);
480
void helper_fyl2xp1(void);
481
void helper_fsqrt(void);
482
void helper_fsincos(void);
483
void helper_frndint(void);
484
void helper_fscale(void);
485
void helper_fsin(void);
486
void helper_fcos(void);
487
void helper_fxam_ST0(void);
488
void helper_fstenv(target_ulong ptr, int data32);
489
void helper_fldenv(target_ulong ptr, int data32);
490
void helper_fsave(target_ulong ptr, int data32);
491
void helper_frstor(target_ulong ptr, int data32);
492
void helper_fxsave(target_ulong ptr, int data64);
493
void helper_fxrstor(target_ulong ptr, int data64);
494
void restore_native_fp_state(CPUState *env);
495
void save_native_fp_state(CPUState *env);
496
float approx_rsqrt(float a);
497
float approx_rcp(float a);
498
void update_fp_status(void);
499

    
500
extern const uint8_t parity_table[256];
501
extern const uint8_t rclw_table[32];
502
extern const uint8_t rclb_table[32];
503

    
504
static inline uint32_t compute_eflags(void)
505
{
506
    return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
507
}
508

    
509
/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
510
static inline void load_eflags(int eflags, int update_mask)
511
{
512
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
513
    DF = 1 - (2 * ((eflags >> 10) & 1));
514
    env->eflags = (env->eflags & ~update_mask) | 
515
        (eflags & update_mask);
516
}
517

    
518
static inline void env_to_regs(void)
519
{
520
#ifdef reg_EAX
521
    EAX = env->regs[R_EAX];
522
#endif
523
#ifdef reg_ECX
524
    ECX = env->regs[R_ECX];
525
#endif
526
#ifdef reg_EDX
527
    EDX = env->regs[R_EDX];
528
#endif
529
#ifdef reg_EBX
530
    EBX = env->regs[R_EBX];
531
#endif
532
#ifdef reg_ESP
533
    ESP = env->regs[R_ESP];
534
#endif
535
#ifdef reg_EBP
536
    EBP = env->regs[R_EBP];
537
#endif
538
#ifdef reg_ESI
539
    ESI = env->regs[R_ESI];
540
#endif
541
#ifdef reg_EDI
542
    EDI = env->regs[R_EDI];
543
#endif
544
}
545

    
546
static inline void regs_to_env(void)
547
{
548
#ifdef reg_EAX
549
    env->regs[R_EAX] = EAX;
550
#endif
551
#ifdef reg_ECX
552
    env->regs[R_ECX] = ECX;
553
#endif
554
#ifdef reg_EDX
555
    env->regs[R_EDX] = EDX;
556
#endif
557
#ifdef reg_EBX
558
    env->regs[R_EBX] = EBX;
559
#endif
560
#ifdef reg_ESP
561
    env->regs[R_ESP] = ESP;
562
#endif
563
#ifdef reg_EBP
564
    env->regs[R_EBP] = EBP;
565
#endif
566
#ifdef reg_ESI
567
    env->regs[R_ESI] = ESI;
568
#endif
569
#ifdef reg_EDI
570
    env->regs[R_EDI] = EDI;
571
#endif
572
}