History | View | Annotate | Download (8.6 kB)
sparc32: ledma extra registers need tracing too
Also trace the extra registers, and update the comments with newinfo from Artyom Tarasenko.
Signed-off-by: Bob Breuer <breuerr@mc.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
sparc32: ledma extra registers
ledma has 0x20 bytes of registers according to OBP, and at least Solaris9reads the 5th register which is beyond what we've mapped. So let's setupa flag (inspired by a previous patch from Blue Swirl) to identify ledmafrom espdma, and map another 16 bytes of registers which return 0....
Add endianness as io mem parameter
As stated before, devices can be little, big or native endian. Thetarget endianness is not of their concern, so we need to push thingsdown a level.
This patch adds a parameter to cpu_register_io_memory that allows adevice to choose its endianness. For now, all devices simply choose...
sparc32: convert debug printf statements to tracepoints
Replace debug printf statements with tracepoints.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
ESP: fix ESP DMA access when DMA is not enabled
Sending ESP a command caused it to trigger DMA immediatelyeven if DMA was not enabled at the DMA controller.
Add a signal from DMA controller to ESP to tell ESP about changes inDMA enable bit. Also use the correct function for setting up GPIO outputs....
sparc32 protect read-only bits in DMA CSR registers
On a real hardware changing read-only bits has no effectUse a mask common for SCSI and Ethernet registers. The crucialbit is DMA_INTR, because setting or clearing it may producespurious interrupts.
This patch allows booting Solaris 2.3...
sparc32 fix spurious dma interrupts v2
Don't raise irq when not enabled.Raise irq on enabling if DMA_INTR is setDon't clear irq unless it was raised by DMA, as there are other irq sourcesDon't set DMA_INTR bit spuriously.
v1->v2: - Don't clear irq unless it was raised by DMA...
Revert "Sparc32: improve DMA controller IRQ debugging"
This reverts commit 787cfbc432bf1d353a77cbdb613754f3963371a3.
Sparc32: improve DMA controller IRQ debugging
sparc32 (mostly): remove unneeded calls to device reset
sparc32: convert DMA controller to reset + vmsd, fix reset on init
Add a missing call to reset on device init.
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
Sparc32: port DMA controller to VMState design
qdev: add return value to init() callbacks.
Sorry folks, but it has to be. One more of these invasive qdev patches.
We have a serious design bug in the qdev interface: device initcallbacks can't signal failure because the init() callback has noreturn value. This patch fixes it....
Make CPURead/WriteFunc structure 'const'
qdev/prop: convert sparc32_dma.c to helper macros.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>Message-Id:
Sparc32: move sparc32_dma init to sun4m.c
Also connect ESP and Lance reset signals to DMA.
qdev: rework device properties.
This patch is a major overhaul of the device properties. The propertiesare saved directly in the device state struct now, the linked list ofproperty values is gone.
Advantages: * We don't have to maintain the list with the property values....
Sparc32: convert sparc32_dma to qdev
Revert "Introduce reset notifier order"
This reverts commit 8217606e6edb49591b4a6fd5a0d1229cebe470a9 (andupdates later added users of qemu_register_reset), we solved theproblem it originally addressed less invasively.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
Remove io_index argument from cpu_register_io_memory()
The parameter is always zero except when registering the three internalio regions (ROM, unassigned, notdirty). Remove the parameter to reducethe API's power, thus facilitating future change.
Signed-off-by: Avi Kivity <avi@redhat.com>...
Introduce reset notifier order
Add the parameter 'order' to qemu_register_reset and sort callbacks onregistration. On system reset, callbacks with lower order will beinvoked before those with higher order. Update all existing users to thestandard order 0....
Replace gcc variadic macro extension with C99 version
hw: remove error handling from qemu_malloc() callers (Avi Kivity)
Signed-off-by: Avi Kivity <avi@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6529 c046a42c-6fe2-441c-8c8c-71466251a162
Revert part of r5853
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6057 c046a42c-6fe2-441c-8c8c-71466251a162
Remove address masking
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5853 c046a42c-6fe2-441c-8c8c-71466251a162
Register only valid register access widths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3881 c046a42c-6fe2-441c-8c8c-71466251a162
Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Remove old leftovers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3121 c046a42c-6fe2-441c-8c8c-71466251a162
Use qemu_irq for a reset signal between DMA and ESP/Lance
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3120 c046a42c-6fe2-441c-8c8c-71466251a162
Use qemu_irqs between dma controllers and esp, lance
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2873 c046a42c-6fe2-441c-8c8c-71466251a162
Split DMA controller in twoFix register size related bugs
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2869 c046a42c-6fe2-441c-8c8c-71466251a162
Use full 36-bit physical address space on SS10
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2830 c046a42c-6fe2-441c-8c8c-71466251a162
Unify IRQ handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
better PCNET endianness support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2147 c046a42c-6fe2-441c-8c8c-71466251a162
Separate the DMA controllers - Convert ESP to new DMA methods (Blue Swirl)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2143 c046a42c-6fe2-441c-8c8c-71466251a162