Revision 6a4955a8
| b/cpu-all.h | ||
|---|---|---|
| 775 | 775 |
|
| 776 | 776 |
void cpu_exit(CPUState *s); |
| 777 | 777 |
|
| 778 |
int qemu_cpu_has_work(CPUState *env); |
|
| 779 |
|
|
| 778 | 780 |
/* Breakpoint/watchpoint flags */ |
| 779 | 781 |
#define BP_MEM_READ 0x01 |
| 780 | 782 |
#define BP_MEM_WRITE 0x02 |
| b/cpu-exec.c | ||
|---|---|---|
| 50 | 50 |
//#define DEBUG_EXEC |
| 51 | 51 |
//#define DEBUG_SIGNAL |
| 52 | 52 |
|
| 53 |
int qemu_cpu_has_work(CPUState *env) |
|
| 54 |
{
|
|
| 55 |
return cpu_has_work(env); |
|
| 56 |
} |
|
| 57 |
|
|
| 53 | 58 |
void cpu_loop_exit(void) |
| 54 | 59 |
{
|
| 55 | 60 |
/* NOTE: the register at this point must be saved by hand because |
| b/target-alpha/exec.h | ||
|---|---|---|
| 48 | 48 |
{
|
| 49 | 49 |
} |
| 50 | 50 |
|
| 51 |
static always_inline int cpu_has_work(CPUState *env) |
|
| 52 |
{
|
|
| 53 |
return (env->interrupt_request & CPU_INTERRUPT_HARD); |
|
| 54 |
} |
|
| 55 |
|
|
| 51 | 56 |
static always_inline int cpu_halted(CPUState *env) {
|
| 52 | 57 |
if (!env->halted) |
| 53 | 58 |
return 0; |
| 54 |
if (env->interrupt_request & CPU_INTERRUPT_HARD) {
|
|
| 59 |
if (cpu_has_work(env)) {
|
|
| 55 | 60 |
env->halted = 0; |
| 56 | 61 |
return 0; |
| 57 | 62 |
} |
| b/target-arm/exec.h | ||
|---|---|---|
| 37 | 37 |
{
|
| 38 | 38 |
} |
| 39 | 39 |
|
| 40 |
static inline int cpu_has_work(CPUState *env) |
|
| 41 |
{
|
|
| 42 |
return (env->interrupt_request & |
|
| 43 |
(CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB)); |
|
| 44 |
} |
|
| 45 |
|
|
| 40 | 46 |
static inline int cpu_halted(CPUState *env) {
|
| 41 | 47 |
if (!env->halted) |
| 42 | 48 |
return 0; |
| 43 | 49 |
/* An interrupt wakes the CPU even if the I and F CPSR bits are |
| 44 | 50 |
set. We use EXITTB to silently wake CPU without causing an |
| 45 | 51 |
actual interrupt. */ |
| 46 |
if (env->interrupt_request & |
|
| 47 |
(CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB)) {
|
|
| 52 |
if (cpu_has_work(env)) {
|
|
| 48 | 53 |
env->halted = 0; |
| 49 | 54 |
return 0; |
| 50 | 55 |
} |
| b/target-cris/exec.h | ||
|---|---|---|
| 40 | 40 |
void cpu_cris_flush_flags(CPUCRISState *env, int cc_op); |
| 41 | 41 |
void helper_movec(CPUCRISState *env, int reg, uint32_t val); |
| 42 | 42 |
|
| 43 |
static inline int cpu_has_work(CPUState *env) |
|
| 44 |
{
|
|
| 45 |
return (env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI)); |
|
| 46 |
} |
|
| 47 |
|
|
| 43 | 48 |
static inline int cpu_halted(CPUState *env) {
|
| 44 | 49 |
if (!env->halted) |
| 45 | 50 |
return 0; |
| b/target-i386/exec.h | ||
|---|---|---|
| 338 | 338 |
#endif |
| 339 | 339 |
} |
| 340 | 340 |
|
| 341 |
static inline int cpu_has_work(CPUState *env) |
|
| 342 |
{
|
|
| 343 |
int work; |
|
| 344 |
|
|
| 345 |
work = (env->interrupt_request & CPU_INTERRUPT_HARD) && |
|
| 346 |
(env->eflags & IF_MASK); |
|
| 347 |
work |= env->interrupt_request & CPU_INTERRUPT_NMI; |
|
| 348 |
|
|
| 349 |
return work; |
|
| 350 |
} |
|
| 351 |
|
|
| 341 | 352 |
static inline int cpu_halted(CPUState *env) {
|
| 342 | 353 |
/* handle exit of HALTED state */ |
| 343 | 354 |
if (!env->halted) |
| 344 | 355 |
return 0; |
| 345 | 356 |
/* disable halt condition */ |
| 346 |
if (((env->interrupt_request & CPU_INTERRUPT_HARD) && |
|
| 347 |
(env->eflags & IF_MASK)) || |
|
| 348 |
(env->interrupt_request & CPU_INTERRUPT_NMI)) {
|
|
| 357 |
if (cpu_has_work(env)) {
|
|
| 349 | 358 |
env->halted = 0; |
| 350 | 359 |
return 0; |
| 351 | 360 |
} |
| b/target-m68k/exec.h | ||
|---|---|---|
| 41 | 41 |
#include "softmmu_exec.h" |
| 42 | 42 |
#endif |
| 43 | 43 |
|
| 44 |
static inline int cpu_has_work(CPUState *env) |
|
| 45 |
{
|
|
| 46 |
return (env->interrupt_request & (CPU_INTERRUPT_HARD)); |
|
| 47 |
} |
|
| 48 |
|
|
| 44 | 49 |
static inline int cpu_halted(CPUState *env) {
|
| 45 | 50 |
if (!env->halted) |
| 46 | 51 |
return 0; |
| 47 |
if (env->interrupt_request & CPU_INTERRUPT_HARD) {
|
|
| 52 |
if (cpu_has_work(env)) {
|
|
| 48 | 53 |
env->halted = 0; |
| 49 | 54 |
return 0; |
| 50 | 55 |
} |
| b/target-mips/exec.h | ||
|---|---|---|
| 33 | 33 |
{
|
| 34 | 34 |
} |
| 35 | 35 |
|
| 36 |
static inline int cpu_has_work(CPUState *env) |
|
| 37 |
{
|
|
| 38 |
return (env->interrupt_request & |
|
| 39 |
(CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER)); |
|
| 40 |
} |
|
| 41 |
|
|
| 42 |
|
|
| 36 | 43 |
static inline int cpu_halted(CPUState *env) |
| 37 | 44 |
{
|
| 38 | 45 |
if (!env->halted) |
| 39 | 46 |
return 0; |
| 40 |
if (env->interrupt_request & |
|
| 41 |
(CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER)) {
|
|
| 47 |
if (cpu_has_work(env)) {
|
|
| 42 | 48 |
env->halted = 0; |
| 43 | 49 |
return 0; |
| 44 | 50 |
} |
| b/target-ppc/exec.h | ||
|---|---|---|
| 44 | 44 |
{
|
| 45 | 45 |
} |
| 46 | 46 |
|
| 47 |
static always_inline int cpu_has_work(CPUState *env) |
|
| 48 |
{
|
|
| 49 |
return (msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD)); |
|
| 50 |
} |
|
| 51 |
|
|
| 52 |
|
|
| 47 | 53 |
static always_inline int cpu_halted (CPUState *env) |
| 48 | 54 |
{
|
| 49 | 55 |
if (!env->halted) |
| 50 | 56 |
return 0; |
| 51 |
if (msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD)) {
|
|
| 57 |
if (cpu_has_work(env)) {
|
|
| 52 | 58 |
env->halted = 0; |
| 53 | 59 |
return 0; |
| 54 | 60 |
} |
| b/target-sh4/exec.h | ||
|---|---|---|
| 28 | 28 |
#include "cpu.h" |
| 29 | 29 |
#include "exec-all.h" |
| 30 | 30 |
|
| 31 |
static inline int cpu_has_work(CPUState *env) |
|
| 32 |
{
|
|
| 33 |
return (env->interrupt_request & CPU_INTERRUPT_HARD); |
|
| 34 |
} |
|
| 35 |
|
|
| 31 | 36 |
static inline int cpu_halted(CPUState *env) {
|
| 32 | 37 |
if (!env->halted) |
| 33 | 38 |
return 0; |
| 34 |
if (env->interrupt_request & CPU_INTERRUPT_HARD) {
|
|
| 39 |
if (cpu_has_work(env)) {
|
|
| 35 | 40 |
env->halted = 0; |
| 36 | 41 |
env->intr_at_halt = 1; |
| 37 | 42 |
return 0; |
| b/target-sparc/exec.h | ||
|---|---|---|
| 24 | 24 |
/* op_helper.c */ |
| 25 | 25 |
void do_interrupt(CPUState *env); |
| 26 | 26 |
|
| 27 |
static inline int cpu_has_work(CPUState *env1) |
|
| 28 |
{
|
|
| 29 |
return (env1->interrupt_request & CPU_INTERRUPT_HARD) && |
|
| 30 |
(env1->psret != 0); |
|
| 31 |
} |
|
| 32 |
|
|
| 33 |
|
|
| 27 | 34 |
static inline int cpu_halted(CPUState *env1) {
|
| 28 | 35 |
if (!env1->halted) |
| 29 | 36 |
return 0; |
| 30 |
if ((env1->interrupt_request & CPU_INTERRUPT_HARD) && (env1->psret != 0)) {
|
|
| 37 |
if (cpu_has_work(env1)) {
|
|
| 31 | 38 |
env1->halted = 0; |
| 32 | 39 |
return 0; |
| 33 | 40 |
} |
Also available in: Unified diff