Revision 6a80e088 cpu-exec.c

b/cpu-exec.c
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                        next_tb = 0;
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                    }
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#elif defined(TARGET_ALPHA)
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                    if (interrupt_request & CPU_INTERRUPT_HARD) {
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                        do_interrupt(env);
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                        next_tb = 0;
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                    {
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                        int idx = -1;
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                        /* ??? This hard-codes the OSF/1 interrupt levels.  */
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		        switch (env->pal_mode ? 7 : env->ps & PS_INT_MASK) {
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                        case 0 ... 3:
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                            if (interrupt_request & CPU_INTERRUPT_HARD) {
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                                idx = EXCP_DEV_INTERRUPT;
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                            }
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                            /* FALLTHRU */
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                        case 4:
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                            if (interrupt_request & CPU_INTERRUPT_TIMER) {
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                                idx = EXCP_CLK_INTERRUPT;
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                            }
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                            /* FALLTHRU */
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                        case 5:
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                            if (interrupt_request & CPU_INTERRUPT_SMP) {
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                                idx = EXCP_SMP_INTERRUPT;
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                            }
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                            /* FALLTHRU */
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                        case 6:
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                            if (interrupt_request & CPU_INTERRUPT_MCHK) {
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                                idx = EXCP_MCHK;
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                            }
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                        }
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                        if (idx >= 0) {
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                            env->exception_index = idx;
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                            env->error_code = 0;
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                            do_interrupt(env);
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                            next_tb = 0;
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                        }
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                    }
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#elif defined(TARGET_CRIS)
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                    if (interrupt_request & CPU_INTERRUPT_HARD

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