Revision 6a8aabd3

b/hw/omap.h
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struct omap_uart_s;
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struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
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                qemu_irq irq, omap_clk fclk, omap_clk iclk,
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                qemu_irq txdma, qemu_irq rxdma, CharDriverState *chr);
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                qemu_irq txdma, qemu_irq rxdma,
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                const char *label, CharDriverState *chr);
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struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,
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                qemu_irq irq, omap_clk fclk, omap_clk iclk,
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                qemu_irq txdma, qemu_irq rxdma, CharDriverState *chr);
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                qemu_irq txdma, qemu_irq rxdma,
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                const char *label, CharDriverState *chr);
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void omap_uart_reset(struct omap_uart_s *s);
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void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr);
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b/hw/omap1.c
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                    omap_findclk(s, "uart1_ck"),
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                    omap_findclk(s, "uart1_ck"),
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                    s->drq[OMAP_DMA_UART1_TX], s->drq[OMAP_DMA_UART1_RX],
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                    "uart1",
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                    serial_hds[0]);
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    s->uart[1] = omap_uart_init(0xfffb0800, s->irq[1][OMAP_INT_UART2],
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                    omap_findclk(s, "uart2_ck"),
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                    omap_findclk(s, "uart2_ck"),
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                    s->drq[OMAP_DMA_UART2_TX], s->drq[OMAP_DMA_UART2_RX],
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                    "uart2",
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                    serial_hds[0] ? serial_hds[1] : NULL);
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    s->uart[2] = omap_uart_init(0xfffb9800, s->irq[0][OMAP_INT_UART3],
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                    omap_findclk(s, "uart3_ck"),
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                    omap_findclk(s, "uart3_ck"),
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                    s->drq[OMAP_DMA_UART3_TX], s->drq[OMAP_DMA_UART3_RX],
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                    "uart3",
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                    serial_hds[0] && serial_hds[1] ? serial_hds[2] : NULL);
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    omap_dpll_init(&s->dpll[0], 0xfffecf00, omap_findclk(s, "dpll1"));
b/hw/omap2.c
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                    omap_findclk(s, "uart1_fclk"),
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                    omap_findclk(s, "uart1_iclk"),
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                    s->drq[OMAP24XX_DMA_UART1_TX],
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                    s->drq[OMAP24XX_DMA_UART1_RX], serial_hds[0]);
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                    s->drq[OMAP24XX_DMA_UART1_RX],
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                    "uart1",
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                    serial_hds[0]);
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    s->uart[1] = omap2_uart_init(omap_l4ta(s->l4, 20),
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                    s->irq[0][OMAP_INT_24XX_UART2_IRQ],
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                    omap_findclk(s, "uart2_fclk"),
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                    omap_findclk(s, "uart2_iclk"),
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                    s->drq[OMAP24XX_DMA_UART2_TX],
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                    s->drq[OMAP24XX_DMA_UART2_RX],
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                    "uart2",
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                    serial_hds[0] ? serial_hds[1] : NULL);
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    s->uart[2] = omap2_uart_init(omap_l4ta(s->l4, 21),
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                    s->irq[0][OMAP_INT_24XX_UART3_IRQ],
......
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                    omap_findclk(s, "uart3_iclk"),
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                    s->drq[OMAP24XX_DMA_UART3_TX],
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                    s->drq[OMAP24XX_DMA_UART3_RX],
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                    "uart3",
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                    serial_hds[0] && serial_hds[1] ? serial_hds[2] : NULL);
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    s->gptimer[0] = omap_gp_timer_init(omap_l4ta(s->l4, 7),
b/hw/omap_uart.c
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struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
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                qemu_irq irq, omap_clk fclk, omap_clk iclk,
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                qemu_irq txdma, qemu_irq rxdma, CharDriverState *chr)
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                qemu_irq txdma, qemu_irq rxdma,
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                const char *label, CharDriverState *chr)
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{
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    struct omap_uart_s *s = (struct omap_uart_s *)
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            qemu_mallocz(sizeof(struct omap_uart_s));
......
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    s->irq = irq;
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#ifdef TARGET_WORDS_BIGENDIAN
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    s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
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                               chr ?: qemu_chr_open("null", "null", NULL), 1,
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                               chr ?: qemu_chr_open(label, "null", NULL), 1,
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                               1);
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#else
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    s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
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                               chr ?: qemu_chr_open("null", "null", NULL), 1,
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                               chr ?: qemu_chr_open(label, "null", NULL), 1,
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                               0);
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#endif
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    return s;
......
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struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,
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                qemu_irq irq, omap_clk fclk, omap_clk iclk,
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                qemu_irq txdma, qemu_irq rxdma, CharDriverState *chr)
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                qemu_irq txdma, qemu_irq rxdma,
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                const char *label, CharDriverState *chr)
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{
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    target_phys_addr_t base = omap_l4_attach(ta, 0, 0);
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    struct omap_uart_s *s = omap_uart_init(base, irq,
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                    fclk, iclk, txdma, rxdma, chr);
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                    fclk, iclk, txdma, rxdma, label, chr);
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    int iomemtype = cpu_register_io_memory(omap_uart_readfn,
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                    omap_uart_writefn, s);
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