Statistics
| Branch: | Revision:

root / hw / ppc_chrp.c @ 6ac0e82d

History | View | Annotate | Download (11 kB)

1
/*
2
 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
3
 *
4
 * Copyright (c) 2004-2007 Fabrice Bellard
5
 * Copyright (c) 2007 Jocelyn Mayer
6
 *
7
 * Permission is hereby granted, free of charge, to any person obtaining a copy
8
 * of this software and associated documentation files (the "Software"), to deal
9
 * in the Software without restriction, including without limitation the rights
10
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11
 * copies of the Software, and to permit persons to whom the Software is
12
 * furnished to do so, subject to the following conditions:
13
 *
14
 * The above copyright notice and this permission notice shall be included in
15
 * all copies or substantial portions of the Software.
16
 *
17
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23
 * THE SOFTWARE.
24
 */
25
#include "vl.h"
26
#include "ppc_mac.h"
27

    
28
/* UniN device */
29
static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
30
{
31
}
32

    
33
static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
34
{
35
    return 0;
36
}
37

    
38
static CPUWriteMemoryFunc *unin_write[] = {
39
    &unin_writel,
40
    &unin_writel,
41
    &unin_writel,
42
};
43

    
44
static CPUReadMemoryFunc *unin_read[] = {
45
    &unin_readl,
46
    &unin_readl,
47
    &unin_readl,
48
};
49

    
50
/* PowerPC Mac99 hardware initialisation */
51
static void ppc_core99_init (int ram_size, int vga_ram_size,
52
                             const char *boot_device, DisplayState *ds,
53
                             const char **fd_filename, int snapshot,
54
                             const char *kernel_filename,
55
                             const char *kernel_cmdline,
56
                             const char *initrd_filename,
57
                             const char *cpu_model)
58
{
59
    CPUState *env, *envs[MAX_CPUS];
60
    char buf[1024];
61
    qemu_irq *pic, **openpic_irqs;
62
    int unin_memory;
63
    int linux_boot, i;
64
    unsigned long bios_offset, vga_bios_offset;
65
    uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
66
    ppc_def_t *def;
67
    PCIBus *pci_bus;
68
    nvram_t nvram;
69
#if 0
70
    MacIONVRAMState *nvr;
71
    int nvram_mem_index;
72
#endif
73
    m48t59_t *m48t59;
74
    int vga_bios_size, bios_size;
75
    qemu_irq *dummy_irq;
76
    int pic_mem_index, dbdma_mem_index, cuda_mem_index;
77
    int ide_mem_index[2];
78
    int ppc_boot_device = boot_device[0];
79

    
80
    linux_boot = (kernel_filename != NULL);
81

    
82
    /* init CPUs */
83
    env = cpu_init();
84
    if (cpu_model == NULL)
85
        cpu_model = "default";
86
    ppc_find_by_name(cpu_model, &def);
87
    if (def == NULL) {
88
        cpu_abort(env, "Unable to find PowerPC CPU definition\n");
89
    }
90
    for (i = 0; i < smp_cpus; i++) {
91
        cpu_ppc_register(env, def);
92
        cpu_ppc_reset(env);
93
        /* Set time-base frequency to 100 Mhz */
94
        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
95
#if 0
96
        env->osi_call = vga_osi_call;
97
#endif
98
        qemu_register_reset(&cpu_ppc_reset, env);
99
        register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
100
        envs[i] = env;
101
    }
102
    if (env->nip < 0xFFF80000) {
103
        /* Special test for PowerPC 601:
104
         * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
105
         * But the NVRAM is located at 0xFFF04000...
106
         */
107
        cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
108
    }
109

    
110
    /* allocate RAM */
111
    cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
112

    
113
    /* allocate and load BIOS */
114
    bios_offset = ram_size + vga_ram_size;
115
    if (bios_name == NULL)
116
        bios_name = BIOS_FILENAME;
117
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
118
    bios_size = load_image(buf, phys_ram_base + bios_offset);
119
    if (bios_size < 0 || bios_size > BIOS_SIZE) {
120
        cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
121
        exit(1);
122
    }
123
    bios_size = (bios_size + 0xfff) & ~0xfff;
124
    if (bios_size > 0x00080000) {
125
        /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
126
        cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
127
    }
128
    cpu_register_physical_memory((uint32_t)(-bios_size),
129
                                 bios_size, bios_offset | IO_MEM_ROM);
130

    
131
    /* allocate and load VGA BIOS */
132
    vga_bios_offset = bios_offset + bios_size;
133
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
134
    vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
135
    if (vga_bios_size < 0) {
136
        /* if no bios is present, we can still work */
137
        fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
138
        vga_bios_size = 0;
139
    } else {
140
        /* set a specific header (XXX: find real Apple format for NDRV
141
           drivers) */
142
        phys_ram_base[vga_bios_offset] = 'N';
143
        phys_ram_base[vga_bios_offset + 1] = 'D';
144
        phys_ram_base[vga_bios_offset + 2] = 'R';
145
        phys_ram_base[vga_bios_offset + 3] = 'V';
146
        cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
147
                     vga_bios_size);
148
        vga_bios_size += 8;
149
    }
150
    vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
151

    
152
    if (linux_boot) {
153
        kernel_base = KERNEL_LOAD_ADDR;
154
        /* now we can load the kernel */
155
        kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
156
        if (kernel_size < 0) {
157
            cpu_abort(env, "qemu: could not load kernel '%s'\n",
158
                      kernel_filename);
159
            exit(1);
160
        }
161
        /* load initrd */
162
        if (initrd_filename) {
163
            initrd_base = INITRD_LOAD_ADDR;
164
            initrd_size = load_image(initrd_filename,
165
                                     phys_ram_base + initrd_base);
166
            if (initrd_size < 0) {
167
                cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
168
                          initrd_filename);
169
                exit(1);
170
            }
171
        } else {
172
            initrd_base = 0;
173
            initrd_size = 0;
174
        }
175
        ppc_boot_device = 'm';
176
    } else {
177
        kernel_base = 0;
178
        kernel_size = 0;
179
        initrd_base = 0;
180
        initrd_size = 0;
181
    }
182

    
183
    isa_mem_base = 0x80000000;
184

    
185
    /* Register 8 MB of ISA IO space */
186
    isa_mmio_init(0xf2000000, 0x00800000);
187

    
188
    /* UniN init */
189
    unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
190
    cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
191

    
192
    openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
193
    openpic_irqs[0] =
194
        qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
195
    for (i = 0; i < smp_cpus; i++) {
196
        /* Mac99 IRQ connection between OpenPIC outputs pins
197
         * and PowerPC input pins
198
         */
199
        switch (PPC_INPUT(env)) {
200
        case PPC_FLAGS_INPUT_6xx:
201
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
202
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
203
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
204
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
205
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
206
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
207
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
208
            /* Not connected ? */
209
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
210
            /* Check this */
211
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
212
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
213
            break;
214
#if defined(TARGET_PPC64)
215
        case PPC_FLAGS_INPUT_970:
216
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
217
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
218
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
219
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
220
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
221
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
222
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
223
            /* Not connected ? */
224
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
225
            /* Check this */
226
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
227
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
228
            break;
229
#endif /* defined(TARGET_PPC64) */
230
        default:
231
            cpu_abort(env, "Bus model not supported on mac99 machine\n");
232
            exit(1);
233
        }
234
    }
235
    pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
236
    pci_bus = pci_pmac_init(pic);
237
    /* init basic PC hardware */
238
    pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
239
                 ram_size, vga_ram_size,
240
                 vga_bios_offset, vga_bios_size);
241
    
242
    /* XXX: suppress that */
243
    dummy_irq = i8259_init(NULL);
244

    
245
    /* XXX: use Mac Serial port */
246
    serial_init(0x3f8, dummy_irq[4], serial_hds[0]);
247
    for(i = 0; i < nb_nics; i++) {
248
        if (!nd_table[i].model)
249
            nd_table[i].model = "ne2k_pci";
250
        pci_nic_init(pci_bus, &nd_table[i], -1);
251
    }
252
#if 1
253
    ide_mem_index[0] = pmac_ide_init(&bs_table[0], pic[0x13]);
254
    ide_mem_index[1] = pmac_ide_init(&bs_table[2], pic[0x14]);
255
#else
256
    pci_cmd646_ide_init(pci_bus, &bs_table[0], 0);
257
#endif
258
    /* cuda also initialize ADB */
259
    cuda_init(&cuda_mem_index, pic[0x19]);
260
    
261
    adb_kbd_init(&adb_bus);
262
    adb_mouse_init(&adb_bus);
263

    
264
    dbdma_init(&dbdma_mem_index);
265

    
266
    macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
267
               cuda_mem_index, -1, 2, ide_mem_index);
268

    
269
    if (usb_enabled) {
270
        usb_ohci_init_pci(pci_bus, 3, -1);
271
    }
272

    
273
    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
274
        graphic_depth = 15;
275
#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
276
    /* The NewWorld NVRAM is not located in the MacIO device */
277
    nvr = macio_nvram_init(&nvram_mem_index);
278
    pmac_format_nvram_partition(nvr, 0x2000);
279
    cpu_register_physical_memory(0xFFF04000, 0x20000, nvram_mem_index);
280
    nvram.opaque = nvr;
281
    nvram.read_fn = &macio_nvram_read;
282
    nvram.write_fn = &macio_nvram_write;
283
#else
284
    m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
285
    nvram.opaque = m48t59;
286
    nvram.read_fn = &m48t59_read;
287
    nvram.write_fn = &m48t59_write;
288
#endif
289
    PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
290
                         ppc_boot_device, kernel_base, kernel_size,
291
                         kernel_cmdline,
292
                         initrd_base, initrd_size,
293
                         /* XXX: need an option to load a NVRAM image */
294
                         0,
295
                         graphic_width, graphic_height, graphic_depth);
296
    /* No PCI init: the BIOS will do it */
297

    
298
    /* Special port to get debug messages from Open-Firmware */
299
    register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
300
 }
301

    
302
QEMUMachine core99_machine = {
303
    "mac99",
304
    "Mac99 based PowerMAC",
305
    ppc_core99_init,
306
};