Revision 6ad02592 target-alpha/translate.c
b/target-alpha/translate.c | ||
---|---|---|
250 | 250 |
static always_inline void gen_excp (DisasContext *ctx, |
251 | 251 |
int exception, int error_code) |
252 | 252 |
{ |
253 |
TCGv tmp1, tmp2; |
|
254 |
|
|
253 | 255 |
tcg_gen_movi_i64(cpu_pc, ctx->pc); |
254 |
gen_op_excp(exception, error_code); |
|
256 |
tmp1 = tcg_const_i32(exception); |
|
257 |
tmp2 = tcg_const_i32(error_code); |
|
258 |
tcg_gen_helper_0_2(helper_excp, tmp1, tmp2); |
|
259 |
tcg_temp_free(tmp2); |
|
260 |
tcg_temp_free(tmp1); |
|
255 | 261 |
} |
256 | 262 |
|
257 | 263 |
static always_inline void gen_invalid (DisasContext *ctx) |
... | ... | |
1176 | 1182 |
break; |
1177 | 1183 |
case 0x6C: |
1178 | 1184 |
/* IMPLVER */ |
1179 |
gen_op_load_implver(); |
|
1180 | 1185 |
if (rc != 31) |
1181 |
tcg_gen_mov_i64(cpu_ir[rc], cpu_T[0]);
|
|
1186 |
tcg_gen_helper_1_0(helper_load_implver, cpu_ir[rc]);
|
|
1182 | 1187 |
break; |
1183 | 1188 |
default: |
1184 | 1189 |
goto invalid_opc; |
... | ... | |
1699 | 1704 |
break; |
1700 | 1705 |
case 0xC000: |
1701 | 1706 |
/* RPCC */ |
1702 |
gen_op_load_pcc(); |
|
1703 | 1707 |
if (ra != 31) |
1704 |
tcg_gen_mov_i64(cpu_ir[ra], cpu_T[0]);
|
|
1708 |
tcg_gen_helper_1_0(helper_load_pcc, cpu_ir[ra]);
|
|
1705 | 1709 |
break; |
1706 | 1710 |
case 0xE000: |
1707 | 1711 |
/* RC */ |
1708 |
gen_op_load_irf(); |
|
1709 | 1712 |
if (ra != 31) |
1710 |
tcg_gen_mov_i64(cpu_ir[ra], cpu_T[0]); |
|
1711 |
gen_op_clear_irf(); |
|
1713 |
tcg_gen_helper_1_0(helper_rc, cpu_ir[ra]); |
|
1712 | 1714 |
break; |
1713 | 1715 |
case 0xE800: |
1714 | 1716 |
/* ECB */ |
... | ... | |
1721 | 1723 |
break; |
1722 | 1724 |
case 0xF000: |
1723 | 1725 |
/* RS */ |
1724 |
gen_op_load_irf(); |
|
1725 | 1726 |
if (ra != 31) |
1726 |
tcg_gen_mov_i64(cpu_ir[ra], cpu_T[0]); |
|
1727 |
gen_op_set_irf(); |
|
1727 |
tcg_gen_helper_1_0(helper_rs, cpu_ir[ra]); |
|
1728 | 1728 |
break; |
1729 | 1729 |
case 0xF800: |
1730 | 1730 |
/* WH64 */ |
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