Revision 6af0bf9c disas.c
| b/disas.c | ||
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| 108 | 108 |
return (bfd_vma) v; |
| 109 | 109 |
} |
| 110 | 110 |
|
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bfd_vma bfd_getl16 (const bfd_byte *addr) |
|
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{
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unsigned long v; |
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v = (unsigned long) addr[0]; |
|
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v |= (unsigned long) addr[1] << 8; |
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return (bfd_vma) v; |
|
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} |
|
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bfd_vma bfd_getb16 (const bfd_byte *addr) |
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{
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unsigned long v; |
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v = (unsigned long) addr[0] << 24; |
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v |= (unsigned long) addr[1] << 16; |
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return (bfd_vma) v; |
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} |
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| 111 | 129 |
#ifdef TARGET_ARM |
| 112 | 130 |
static int |
| 113 | 131 |
print_insn_thumb1(bfd_vma pc, disassemble_info *info) |
| ... | ... | |
| 162 | 180 |
if (cpu_single_env->msr[MSR_LE]) |
| 163 | 181 |
disasm_info.endian = BFD_ENDIAN_LITTLE; |
| 164 | 182 |
print_insn = print_insn_ppc; |
| 183 |
#elif defined(TARGET_MIPS) |
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print_insn = print_insn_big_mips; |
|
| 165 | 185 |
#else |
| 166 | 186 |
fprintf(out, "0x" TARGET_FMT_lx |
| 167 | 187 |
": Asm output not supported on this arch\n", code); |
| ... | ... | |
| 222 | 242 |
print_insn = print_insn_sparc; |
| 223 | 243 |
#elif defined(__arm__) |
| 224 | 244 |
print_insn = print_insn_arm; |
| 245 |
#elif defined(__MIPSEB__) |
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print_insn = print_insn_big_mips; |
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#elif defined(__MIPSEL__) |
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print_insn = print_insn_little_mips; |
|
| 225 | 249 |
#else |
| 226 | 250 |
fprintf(out, "0x%lx: Asm output not supported on this arch\n", |
| 227 | 251 |
(long) code); |
| ... | ... | |
| 332 | 356 |
print_insn = print_insn_sparc; |
| 333 | 357 |
#elif defined(TARGET_PPC) |
| 334 | 358 |
print_insn = print_insn_ppc; |
| 359 |
#elif defined(TARGET_MIPS) |
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print_insn = print_insn_big_mips; |
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| 335 | 361 |
#else |
| 336 | 362 |
term_printf("0x" TARGET_FMT_lx
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| 337 | 363 |
": Asm output not supported on this arch\n", pc); |
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