root / target-mips / exec.h @ 6af0bf9c
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#if !defined(__QEMU_MIPS_EXEC_H__)
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#define __QEMU_MIPS_EXEC_H__
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#define DEBUG_OP
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#include "mips-defs.h" |
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#include "dyngen-exec.h" |
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register struct CPUMIPSState *env asm(AREG0); |
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#if defined (USE_64BITS_REGS)
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typedef int64_t host_int_t;
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typedef uint64_t host_uint_t;
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#else
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typedef int32_t host_int_t;
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typedef uint32_t host_uint_t;
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#endif
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register host_uint_t T0 asm(AREG1); |
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register host_uint_t T1 asm(AREG2); |
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register host_uint_t T2 asm(AREG3); |
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register host_int_t Ts0 asm(AREG1); |
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register host_int_t Ts1 asm(AREG2); |
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register host_int_t Ts2 asm(AREG3); |
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#define PARAM(n) ((uint32_t)PARAM##n) |
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#define SPARAM(n) ((int32_t)PARAM##n) |
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#if defined (USE_HOST_FLOAT_REGS)
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register double FT0 asm(FREG0); |
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register double FT1 asm(FREG1); |
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register double FT2 asm(FREG2); |
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register float FTS0 asm(FREG0); |
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register float FTS1 asm(FREG1); |
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register float FTS2 asm(FREG2); |
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#else
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#define FT0 (env->ft0.d)
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#define FT1 (env->ft1.d)
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#define FT2 (env->ft2.d)
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#define FTS0 (env->ft0.f)
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#define FTS1 (env->ft1.f)
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#define FTS2 (env->ft2.f)
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#endif
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#if defined (DEBUG_OP)
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#define RETURN() __asm__ __volatile__("nop"); |
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#else
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#define RETURN() __asm__ __volatile__(""); |
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#endif
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#include "cpu.h" |
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#include "exec-all.h" |
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#if !defined(CONFIG_USER_ONLY)
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#define ldul_user ldl_user
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#define ldul_kernel ldl_kernel
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#define ACCESS_TYPE 0 |
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#define MEMSUFFIX _kernel
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#define DATA_SIZE 1 |
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#include "softmmu_header.h" |
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#define DATA_SIZE 2 |
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#include "softmmu_header.h" |
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#define DATA_SIZE 4 |
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#include "softmmu_header.h" |
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#define DATA_SIZE 8 |
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#include "softmmu_header.h" |
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#undef ACCESS_TYPE
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#undef MEMSUFFIX
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#define ACCESS_TYPE 1 |
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#define MEMSUFFIX _user
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#define DATA_SIZE 1 |
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#include "softmmu_header.h" |
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#define DATA_SIZE 2 |
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#include "softmmu_header.h" |
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#define DATA_SIZE 4 |
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#include "softmmu_header.h" |
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#define DATA_SIZE 8 |
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#include "softmmu_header.h" |
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#undef ACCESS_TYPE
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#undef MEMSUFFIX
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/* these access are slower, they must be as rare as possible */
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#define ACCESS_TYPE 2 |
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#define MEMSUFFIX _data
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#define DATA_SIZE 1 |
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#include "softmmu_header.h" |
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#define DATA_SIZE 2 |
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#include "softmmu_header.h" |
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#define DATA_SIZE 4 |
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#include "softmmu_header.h" |
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#define DATA_SIZE 8 |
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#include "softmmu_header.h" |
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#undef ACCESS_TYPE
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#undef MEMSUFFIX
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#define ldub(p) ldub_data(p)
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#define ldsb(p) ldsb_data(p)
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#define lduw(p) lduw_data(p)
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#define ldsw(p) ldsw_data(p)
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#define ldl(p) ldl_data(p)
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#define ldq(p) ldq_data(p)
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#define stb(p, v) stb_data(p, v)
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#define stw(p, v) stw_data(p, v)
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#define stl(p, v) stl_data(p, v)
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#define stq(p, v) stq_data(p, v)
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#endif /* !defined(CONFIG_USER_ONLY) */ |
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static inline void env_to_regs(void) |
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{
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} |
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static inline void regs_to_env(void) |
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{
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} |
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#if (HOST_LONG_BITS == 32) |
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void do_mult (void); |
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void do_multu (void); |
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void do_madd (void); |
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void do_maddu (void); |
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void do_msub (void); |
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void do_msubu (void); |
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#endif
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__attribute__ (( regparm(2) ))
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void do_mfc0(int reg, int sel); |
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__attribute__ (( regparm(2) ))
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void do_mtc0(int reg, int sel); |
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void do_tlbwi (void); |
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void do_tlbwr (void); |
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void do_tlbp (void); |
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void do_tlbr (void); |
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void do_lwl_raw (void); |
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void do_lwr_raw (void); |
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void do_swl_raw (void); |
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void do_swr_raw (void); |
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#if !defined(CONFIG_USER_ONLY)
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void do_lwl_user (void); |
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void do_lwl_kernel (void); |
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void do_lwr_user (void); |
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void do_lwr_kernel (void); |
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void do_swl_user (void); |
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void do_swl_kernel (void); |
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void do_swr_user (void); |
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void do_swr_kernel (void); |
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#endif
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__attribute__ (( regparm(1) ))
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void do_pmon (int function); |
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int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, |
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int is_user, int is_softmmu); |
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void do_interrupt (CPUState *env);
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void cpu_loop_exit(void); |
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__attribute__ (( regparm(2) ))
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void do_raise_exception_err (uint32_t exception, int error_code); |
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__attribute__ (( regparm(1) ))
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void do_raise_exception (uint32_t exception);
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void cpu_dump_state(CPUState *env, FILE *f,
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int (*cpu_fprintf)(FILE *f, const char *fmt, ...), |
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int flags);
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void cpu_mips_irqctrl_init (void); |
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uint32_t cpu_mips_get_random (CPUState *env); |
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uint32_t cpu_mips_get_count (CPUState *env); |
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void cpu_mips_store_count (CPUState *env, uint32_t value);
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void cpu_mips_store_compare (CPUState *env, uint32_t value);
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void cpu_mips_clock_init (CPUState *env);
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#endif /* !defined(__QEMU_MIPS_EXEC_H__) */ |