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# Date Author Comment
56779034 01/12/2011 01:06 am Aurelien Jarno

tcg arm/mips/ia64: add a comment about retranslation and caches

Add a comment about cache coherency and retranslation, so that people
developping new targets based on existing ones are warned of the issue.

Acked-by: Edgar E. Iglesias <>...

d43ffce1 01/08/2011 05:41 pm Aurelien Jarno

tcg/mips: fix branch target change during code retranslation

TCG on MIPS was trying to avoid changing the branch offset, but didn't
due to a stupid typo. Fix it.

Signed-off-by: Aurelien Jarno <>

e4d58b41 06/09/2010 12:18 pm Richard Henderson

tcg: Make some tcg-target.c routines static.

Both tcg_target_init and tcg_target_qemu_prologue
are unused outside of tcg.c.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

3b6dac34 06/09/2010 12:18 pm Richard Henderson

tcg: Add TYPE parameter to tcg_out_mov.

Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64
to perform the move at the proper width, which may elide a REX prefix.

Introduce a TCG_TYPE_REG enumerator to represent the "native width"
of the host register, and to distinguish the usage from "pointer data"...

60bf84cf 04/14/2010 01:59 am Stefan Weil

tcp/mips: Change TCG_AREG0 (fp -> s0)

Register fp (frame pointer) is a bad choice for compilations
without optimisation, because the compiler makes heavy use
of this register (so the resulting code crashes).

Register s0 had been used for TCG_AREG1 in earlier releases,...

ba0d89bb 04/05/2010 04:16 pm Aurelien Jarno

tcg/mips: fix 64-bit linux-user on big endian MIPS

Signed-off-by: Aurelien Jarno <>

116348de 04/05/2010 04:16 pm Aurelien Jarno

tcg/mips: use seb/seh instructions on MIPS32R2

Signed-off-by: Aurelien Jarno <>

355b1943 04/05/2010 02:28 am Paul Brook

Split TLB addend and target_phys_addr_t

Historically the qemu tlb "addend" field was used for both RAM and IO accesses,
so needed to be able to hold both host addresses (unsigned long) and guest
physical addresses (target_phys_addr_t). However since the introduction of...

6d8ff4d8 03/29/2010 03:09 am Aurelien Jarno

tcg/mips: fix branch offset during retranslation

Branch offsets should only be overwritten during relocation, to support
partial retranslation.

Signed-off-by: Aurelien Jarno <>

cc01cc8e 03/27/2010 06:31 pm Aurelien Jarno

tcg-mips: add guest base support

Signed-off-by: Aurelien Jarno <>

489722cf 03/27/2010 05:50 pm Aurelien Jarno

tcg/mips: implement the not_i32 op the same way as gcc

Signed-off-by: Aurelien Jarno <>

2b79487a 03/27/2010 05:32 pm Aurelien Jarno

tcg-mips: implement nor

Signed-off-by: Aurelien Jarno <>

86feb1c8 03/27/2010 12:01 am Richard Henderson

tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.

Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operands
sign-extended in 64-bit registers (regardless of the "real" sign
of the operand). For that, we need to be able to distinguish
between a 32-bit load with a 32-bit result and a 32-bit load with...

8a56e840 03/26/2010 10:29 pm Richard Henderson

tcg: Use TCGCond where appropriate.

Use the TCGCond enumeration type in the brcond and setcond
related prototypes in tcg-op.h and each code generator.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a9751609 03/26/2010 10:28 pm Richard Henderson

tcg: Name the opcode enumeration.

Give the enumeration formed from tcg-opc.h a name: TCGOpcode.
Use that enumeration type instead of "int" whereever appropriate.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

cca1af8c 02/09/2010 11:54 pm Aurelien Jarno

tcg/mips: fix crash in tcg_out_qemu_ld()

The address register is overriden when it corresponds to v0 and the fast
path is taken, which leads to a crash. Fix that by using the a0 register

Signed-off-by: Aurelien Jarno <>

434254aa 02/09/2010 02:01 am Aurelien Jarno

tcg/mips: implement setcond2

Signed-off-by: Aurelien Jarno <>

4cb26382 02/08/2010 05:37 pm Aurelien Jarno

tcg/mips: implement setcond

Signed-off-by: Aurelien Jarno <>

afa05235 12/01/2009 02:06 am Aurelien Jarno

tcg: initial mips support

Based on a patch from Arnaud Patard (Rtp) <>

A few words about design choices:
  • Two registers, at and t0, are reserved for TCG internal use. They are
    useful for bswap and 64-bit ops.
  • Most ops supports a constant argument with value 0, which is actually...