Revision 6bf5b4e8
| b/Makefile.target | ||
|---|---|---|
| 478 | 478 |
CPPFLAGS += -DHAS_AUDIO -DHAS_AUDIO_CHOICE |
| 479 | 479 |
endif |
| 480 | 480 |
ifeq ($(TARGET_BASE_ARCH), mips) |
| 481 |
VL_OBJS+= mips_r4k.o mips_malta.o mips_pica61.o |
|
| 481 |
VL_OBJS+= mips_r4k.o mips_malta.o mips_pica61.o mips_mipssim.o
|
|
| 482 | 482 |
VL_OBJS+= mips_timer.o mips_int.o dma.o vga.o serial.o i8254.o i8259.o |
| 483 | 483 |
VL_OBJS+= jazz_led.o |
| 484 | 484 |
VL_OBJS+= ide.o gt64xxx.o pckbd.o ps2.o fdc.o mc146818rtc.o usb-uhci.o acpi.o ds1225y.o |
| 485 | 485 |
VL_OBJS+= piix_pci.o smbus_eeprom.o parallel.o mixeng.o cirrus_vga.o $(SOUND_HW) $(AUDIODRV) |
| 486 |
VL_OBJS+= mipsnet.o |
|
| 486 | 487 |
CPPFLAGS += -DHAS_AUDIO |
| 487 | 488 |
endif |
| 488 | 489 |
ifeq ($(TARGET_BASE_ARCH), cris) |
| b/qemu-doc.texi | ||
|---|---|---|
| 2036 | 2036 |
The MIPS Malta prototype board "malta" |
| 2037 | 2037 |
@item |
| 2038 | 2038 |
An ACER Pica "pica61" |
| 2039 |
@item |
|
| 2040 |
MIPS MIPSsim emulator pseudo board "mipssim" |
|
| 2039 | 2041 |
@end itemize |
| 2040 | 2042 |
|
| 2041 | 2043 |
The generic emulation is supported by Debian 'Etch' and is able to |
| ... | ... | |
| 2044 | 2046 |
|
| 2045 | 2047 |
@itemize @minus |
| 2046 | 2048 |
@item |
| 2047 |
MIPS 24Kf CPU
|
|
| 2049 |
A range of MIPS CPUs, default is the 24Kf
|
|
| 2048 | 2050 |
@item |
| 2049 | 2051 |
PC style serial port |
| 2050 | 2052 |
@item |
| ... | ... | |
| 2083 | 2085 |
IDE controller |
| 2084 | 2086 |
@end itemize |
| 2085 | 2087 |
|
| 2088 |
The MIPSsim emulation supports: |
|
| 2089 |
|
|
| 2090 |
@itemize @minus |
|
| 2091 |
@item |
|
| 2092 |
A range of MIPS CPUs, default is the 24Kf |
|
| 2093 |
@item |
|
| 2094 |
PC style serial port |
|
| 2095 |
@item |
|
| 2096 |
MIPSnet network emulation |
|
| 2097 |
@end itemize |
|
| 2098 |
|
|
| 2086 | 2099 |
@node ARM System emulator |
| 2087 | 2100 |
@section ARM System emulator |
| 2088 | 2101 |
|
| b/vl.c | ||
|---|---|---|
| 7365 | 7365 |
qemu_register_machine(&mips_machine); |
| 7366 | 7366 |
qemu_register_machine(&mips_malta_machine); |
| 7367 | 7367 |
qemu_register_machine(&mips_pica61_machine); |
| 7368 |
qemu_register_machine(&mips_mipssim_machine); |
|
| 7368 | 7369 |
#elif defined(TARGET_SPARC) |
| 7369 | 7370 |
#ifdef TARGET_SPARC64 |
| 7370 | 7371 |
qemu_register_machine(&sun4u_machine); |
| b/vl.h | ||
|---|---|---|
| 1068 | 1068 |
void lance_init(NICInfo *nd, target_phys_addr_t leaddr, void *dma_opaque, |
| 1069 | 1069 |
qemu_irq irq, qemu_irq *reset); |
| 1070 | 1070 |
|
| 1071 |
/* mipsnet.c */ |
|
| 1072 |
void mipsnet_init(int base, qemu_irq irq, NICInfo *nd); |
|
| 1073 |
|
|
| 1071 | 1074 |
/* vmmouse.c */ |
| 1072 | 1075 |
void *vmmouse_init(void *m); |
| 1073 | 1076 |
|
| ... | ... | |
| 1190 | 1193 |
/* mips_malta.c */ |
| 1191 | 1194 |
extern QEMUMachine mips_malta_machine; |
| 1192 | 1195 |
|
| 1193 |
/* mips_int.c */ |
|
| 1194 |
extern void cpu_mips_irq_init_cpu(CPUState *env); |
|
| 1195 |
|
|
| 1196 | 1196 |
/* mips_pica61.c */ |
| 1197 | 1197 |
extern QEMUMachine mips_pica61_machine; |
| 1198 | 1198 |
|
| 1199 |
/* mips_mipssim.c */ |
|
| 1200 |
extern QEMUMachine mips_mipssim_machine; |
|
| 1201 |
|
|
| 1202 |
/* mips_int.c */ |
|
| 1203 |
extern void cpu_mips_irq_init_cpu(CPUState *env); |
|
| 1204 |
|
|
| 1199 | 1205 |
/* mips_timer.c */ |
| 1200 | 1206 |
extern void cpu_mips_clock_init(CPUState *); |
| 1201 | 1207 |
extern void cpu_mips_irqctrl_init (void); |
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