root / hw / spitz.c @ 6c0bd6bd
History | View | Annotate | Download (29 kB)
1 |
/*
|
---|---|
2 |
* PXA270-based Clamshell PDA platforms.
|
3 |
*
|
4 |
* Copyright (c) 2006 Openedhand Ltd.
|
5 |
* Written by Andrzej Zaborowski <balrog@zabor.org>
|
6 |
*
|
7 |
* This code is licensed under the GNU GPL v2.
|
8 |
*/
|
9 |
|
10 |
#include "hw.h" |
11 |
#include "pxa.h" |
12 |
#include "arm-misc.h" |
13 |
#include "sysemu.h" |
14 |
#include "pcmcia.h" |
15 |
#include "i2c.h" |
16 |
#include "flash.h" |
17 |
#include "qemu-timer.h" |
18 |
#include "devices.h" |
19 |
#include "sharpsl.h" |
20 |
#include "console.h" |
21 |
#include "block.h" |
22 |
#include "audio/audio.h" |
23 |
#include "boards.h" |
24 |
|
25 |
#undef REG_FMT
|
26 |
#if TARGET_PHYS_ADDR_BITS == 32 |
27 |
#define REG_FMT "0x%02x" |
28 |
#else
|
29 |
#define REG_FMT "0x%02lx" |
30 |
#endif
|
31 |
|
32 |
/* Spitz Flash */
|
33 |
#define FLASH_BASE 0x0c000000 |
34 |
#define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ |
35 |
#define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ |
36 |
#define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ |
37 |
#define FLASH_ECCCNTR 0x0c /* ECC byte counter */ |
38 |
#define FLASH_ECCCLRR 0x10 /* Clear ECC */ |
39 |
#define FLASH_FLASHIO 0x14 /* Flash I/O */ |
40 |
#define FLASH_FLASHCTL 0x18 /* Flash Control */ |
41 |
|
42 |
#define FLASHCTL_CE0 (1 << 0) |
43 |
#define FLASHCTL_CLE (1 << 1) |
44 |
#define FLASHCTL_ALE (1 << 2) |
45 |
#define FLASHCTL_WP (1 << 3) |
46 |
#define FLASHCTL_CE1 (1 << 4) |
47 |
#define FLASHCTL_RYBY (1 << 5) |
48 |
#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
|
49 |
|
50 |
typedef struct { |
51 |
NANDFlashState *nand; |
52 |
uint8_t ctl; |
53 |
ECCState ecc; |
54 |
} SLNANDState; |
55 |
|
56 |
static uint32_t sl_readb(void *opaque, target_phys_addr_t addr) |
57 |
{ |
58 |
SLNANDState *s = (SLNANDState *) opaque; |
59 |
int ryby;
|
60 |
|
61 |
switch (addr) {
|
62 |
#define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) |
63 |
case FLASH_ECCLPLB:
|
64 |
return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | |
65 |
BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); |
66 |
|
67 |
#define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) |
68 |
case FLASH_ECCLPUB:
|
69 |
return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | |
70 |
BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); |
71 |
|
72 |
case FLASH_ECCCP:
|
73 |
return s->ecc.cp;
|
74 |
|
75 |
case FLASH_ECCCNTR:
|
76 |
return s->ecc.count & 0xff; |
77 |
|
78 |
case FLASH_FLASHCTL:
|
79 |
nand_getpins(s->nand, &ryby); |
80 |
if (ryby)
|
81 |
return s->ctl | FLASHCTL_RYBY;
|
82 |
else
|
83 |
return s->ctl;
|
84 |
|
85 |
case FLASH_FLASHIO:
|
86 |
return ecc_digest(&s->ecc, nand_getio(s->nand));
|
87 |
|
88 |
default:
|
89 |
zaurus_printf("Bad register offset " REG_FMT "\n", addr); |
90 |
} |
91 |
return 0; |
92 |
} |
93 |
|
94 |
static uint32_t sl_readl(void *opaque, target_phys_addr_t addr) |
95 |
{ |
96 |
SLNANDState *s = (SLNANDState *) opaque; |
97 |
|
98 |
if (addr == FLASH_FLASHIO)
|
99 |
return ecc_digest(&s->ecc, nand_getio(s->nand)) |
|
100 |
(ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
|
101 |
|
102 |
return sl_readb(opaque, addr);
|
103 |
} |
104 |
|
105 |
static void sl_writeb(void *opaque, target_phys_addr_t addr, |
106 |
uint32_t value) |
107 |
{ |
108 |
SLNANDState *s = (SLNANDState *) opaque; |
109 |
|
110 |
switch (addr) {
|
111 |
case FLASH_ECCCLRR:
|
112 |
/* Value is ignored. */
|
113 |
ecc_reset(&s->ecc); |
114 |
break;
|
115 |
|
116 |
case FLASH_FLASHCTL:
|
117 |
s->ctl = value & 0xff & ~FLASHCTL_RYBY;
|
118 |
nand_setpins(s->nand, |
119 |
s->ctl & FLASHCTL_CLE, |
120 |
s->ctl & FLASHCTL_ALE, |
121 |
s->ctl & FLASHCTL_NCE, |
122 |
s->ctl & FLASHCTL_WP, |
123 |
0);
|
124 |
break;
|
125 |
|
126 |
case FLASH_FLASHIO:
|
127 |
nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
|
128 |
break;
|
129 |
|
130 |
default:
|
131 |
zaurus_printf("Bad register offset " REG_FMT "\n", addr); |
132 |
} |
133 |
} |
134 |
|
135 |
static void sl_save(QEMUFile *f, void *opaque) |
136 |
{ |
137 |
SLNANDState *s = (SLNANDState *) opaque; |
138 |
|
139 |
qemu_put_8s(f, &s->ctl); |
140 |
ecc_put(f, &s->ecc); |
141 |
} |
142 |
|
143 |
static int sl_load(QEMUFile *f, void *opaque, int version_id) |
144 |
{ |
145 |
SLNANDState *s = (SLNANDState *) opaque; |
146 |
|
147 |
qemu_get_8s(f, &s->ctl); |
148 |
ecc_get(f, &s->ecc); |
149 |
|
150 |
return 0; |
151 |
} |
152 |
|
153 |
enum {
|
154 |
FLASH_128M, |
155 |
FLASH_1024M, |
156 |
}; |
157 |
|
158 |
static void sl_flash_register(PXA2xxState *cpu, int size) |
159 |
{ |
160 |
int iomemtype;
|
161 |
SLNANDState *s; |
162 |
CPUReadMemoryFunc *sl_readfn[] = { |
163 |
sl_readb, |
164 |
sl_readb, |
165 |
sl_readl, |
166 |
}; |
167 |
CPUWriteMemoryFunc *sl_writefn[] = { |
168 |
sl_writeb, |
169 |
sl_writeb, |
170 |
sl_writeb, |
171 |
}; |
172 |
|
173 |
s = (SLNANDState *) qemu_mallocz(sizeof(SLNANDState));
|
174 |
s->ctl = 0;
|
175 |
if (size == FLASH_128M)
|
176 |
s->nand = nand_init(NAND_MFR_SAMSUNG, 0x73);
|
177 |
else if (size == FLASH_1024M) |
178 |
s->nand = nand_init(NAND_MFR_SAMSUNG, 0xf1);
|
179 |
|
180 |
iomemtype = cpu_register_io_memory(0, sl_readfn,
|
181 |
sl_writefn, s); |
182 |
cpu_register_physical_memory(FLASH_BASE, 0x40, iomemtype);
|
183 |
|
184 |
register_savevm("sl_flash", 0, 0, sl_save, sl_load, s); |
185 |
} |
186 |
|
187 |
/* Spitz Keyboard */
|
188 |
|
189 |
#define SPITZ_KEY_STROBE_NUM 11 |
190 |
#define SPITZ_KEY_SENSE_NUM 7 |
191 |
|
192 |
static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { |
193 |
12, 17, 91, 34, 36, 38, 39 |
194 |
}; |
195 |
|
196 |
static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { |
197 |
88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 |
198 |
}; |
199 |
|
200 |
/* Eighth additional row maps the special keys */
|
201 |
static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { |
202 |
{ 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, |
203 |
{ -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, |
204 |
{ 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, |
205 |
{ 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, |
206 |
{ 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, |
207 |
{ 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, |
208 |
{ 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, |
209 |
{ 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, |
210 |
}; |
211 |
|
212 |
#define SPITZ_GPIO_AK_INT 13 /* Remote control */ |
213 |
#define SPITZ_GPIO_SYNC 16 /* Sync button */ |
214 |
#define SPITZ_GPIO_ON_KEY 95 /* Power button */ |
215 |
#define SPITZ_GPIO_SWA 97 /* Lid */ |
216 |
#define SPITZ_GPIO_SWB 96 /* Tablet mode */ |
217 |
|
218 |
/* The special buttons are mapped to unused keys */
|
219 |
static const int spitz_gpiomap[5] = { |
220 |
SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, |
221 |
SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, |
222 |
}; |
223 |
static int spitz_gpio_invert[5] = { 0, 0, 0, 0, 0, }; |
224 |
|
225 |
typedef struct { |
226 |
qemu_irq sense[SPITZ_KEY_SENSE_NUM]; |
227 |
qemu_irq *strobe; |
228 |
qemu_irq gpiomap[5];
|
229 |
int keymap[0x80]; |
230 |
uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; |
231 |
uint16_t strobe_state; |
232 |
uint16_t sense_state; |
233 |
|
234 |
uint16_t pre_map[0x100];
|
235 |
uint16_t modifiers; |
236 |
uint16_t imodifiers; |
237 |
uint8_t fifo[16];
|
238 |
int fifopos, fifolen;
|
239 |
QEMUTimer *kbdtimer; |
240 |
} SpitzKeyboardState; |
241 |
|
242 |
static void spitz_keyboard_sense_update(SpitzKeyboardState *s) |
243 |
{ |
244 |
int i;
|
245 |
uint16_t strobe, sense = 0;
|
246 |
for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { |
247 |
strobe = s->keyrow[i] & s->strobe_state; |
248 |
if (strobe) {
|
249 |
sense |= 1 << i;
|
250 |
if (!(s->sense_state & (1 << i))) |
251 |
qemu_irq_raise(s->sense[i]); |
252 |
} else if (s->sense_state & (1 << i)) |
253 |
qemu_irq_lower(s->sense[i]); |
254 |
} |
255 |
|
256 |
s->sense_state = sense; |
257 |
} |
258 |
|
259 |
static void spitz_keyboard_strobe(void *opaque, int line, int level) |
260 |
{ |
261 |
SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
262 |
|
263 |
if (level)
|
264 |
s->strobe_state |= 1 << line;
|
265 |
else
|
266 |
s->strobe_state &= ~(1 << line);
|
267 |
spitz_keyboard_sense_update(s); |
268 |
} |
269 |
|
270 |
static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) |
271 |
{ |
272 |
int spitz_keycode = s->keymap[keycode & 0x7f]; |
273 |
if (spitz_keycode == -1) |
274 |
return;
|
275 |
|
276 |
/* Handle the additional keys */
|
277 |
if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { |
278 |
qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80) ^ |
279 |
spitz_gpio_invert[spitz_keycode & 0xf]);
|
280 |
return;
|
281 |
} |
282 |
|
283 |
if (keycode & 0x80) |
284 |
s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); |
285 |
else
|
286 |
s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); |
287 |
|
288 |
spitz_keyboard_sense_update(s); |
289 |
} |
290 |
|
291 |
#define SHIFT (1 << 7) |
292 |
#define CTRL (1 << 8) |
293 |
#define FN (1 << 9) |
294 |
|
295 |
#define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c |
296 |
|
297 |
static void spitz_keyboard_handler(SpitzKeyboardState *s, int keycode) |
298 |
{ |
299 |
uint16_t code; |
300 |
int mapcode;
|
301 |
switch (keycode) {
|
302 |
case 0x2a: /* Left Shift */ |
303 |
s->modifiers |= 1;
|
304 |
break;
|
305 |
case 0xaa: |
306 |
s->modifiers &= ~1;
|
307 |
break;
|
308 |
case 0x36: /* Right Shift */ |
309 |
s->modifiers |= 2;
|
310 |
break;
|
311 |
case 0xb6: |
312 |
s->modifiers &= ~2;
|
313 |
break;
|
314 |
case 0x1d: /* Control */ |
315 |
s->modifiers |= 4;
|
316 |
break;
|
317 |
case 0x9d: |
318 |
s->modifiers &= ~4;
|
319 |
break;
|
320 |
case 0x38: /* Alt */ |
321 |
s->modifiers |= 8;
|
322 |
break;
|
323 |
case 0xb8: |
324 |
s->modifiers &= ~8;
|
325 |
break;
|
326 |
} |
327 |
|
328 |
code = s->pre_map[mapcode = ((s->modifiers & 3) ?
|
329 |
(keycode | SHIFT) : |
330 |
(keycode & ~SHIFT))]; |
331 |
|
332 |
if (code != mapcode) {
|
333 |
#if 0
|
334 |
if ((code & SHIFT) && !(s->modifiers & 1))
|
335 |
QUEUE_KEY(0x2a | (keycode & 0x80));
|
336 |
if ((code & CTRL ) && !(s->modifiers & 4))
|
337 |
QUEUE_KEY(0x1d | (keycode & 0x80));
|
338 |
if ((code & FN ) && !(s->modifiers & 8))
|
339 |
QUEUE_KEY(0x38 | (keycode & 0x80));
|
340 |
if ((code & FN ) && (s->modifiers & 1))
|
341 |
QUEUE_KEY(0x2a | (~keycode & 0x80));
|
342 |
if ((code & FN ) && (s->modifiers & 2))
|
343 |
QUEUE_KEY(0x36 | (~keycode & 0x80));
|
344 |
#else
|
345 |
if (keycode & 0x80) { |
346 |
if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) |
347 |
QUEUE_KEY(0x2a | 0x80); |
348 |
if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) |
349 |
QUEUE_KEY(0x1d | 0x80); |
350 |
if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) |
351 |
QUEUE_KEY(0x38 | 0x80); |
352 |
if ((s->imodifiers & 0x10) && (s->modifiers & 1)) |
353 |
QUEUE_KEY(0x2a);
|
354 |
if ((s->imodifiers & 0x20) && (s->modifiers & 2)) |
355 |
QUEUE_KEY(0x36);
|
356 |
s->imodifiers = 0;
|
357 |
} else {
|
358 |
if ((code & SHIFT) && !((s->modifiers | s->imodifiers) & 1)) { |
359 |
QUEUE_KEY(0x2a);
|
360 |
s->imodifiers |= 1;
|
361 |
} |
362 |
if ((code & CTRL ) && !((s->modifiers | s->imodifiers) & 4)) { |
363 |
QUEUE_KEY(0x1d);
|
364 |
s->imodifiers |= 4;
|
365 |
} |
366 |
if ((code & FN ) && !((s->modifiers | s->imodifiers) & 8)) { |
367 |
QUEUE_KEY(0x38);
|
368 |
s->imodifiers |= 8;
|
369 |
} |
370 |
if ((code & FN ) && (s->modifiers & 1) && |
371 |
!(s->imodifiers & 0x10)) {
|
372 |
QUEUE_KEY(0x2a | 0x80); |
373 |
s->imodifiers |= 0x10;
|
374 |
} |
375 |
if ((code & FN ) && (s->modifiers & 2) && |
376 |
!(s->imodifiers & 0x20)) {
|
377 |
QUEUE_KEY(0x36 | 0x80); |
378 |
s->imodifiers |= 0x20;
|
379 |
} |
380 |
} |
381 |
#endif
|
382 |
} |
383 |
|
384 |
QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); |
385 |
} |
386 |
|
387 |
static void spitz_keyboard_tick(void *opaque) |
388 |
{ |
389 |
SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
390 |
|
391 |
if (s->fifolen) {
|
392 |
spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); |
393 |
s->fifolen --; |
394 |
if (s->fifopos >= 16) |
395 |
s->fifopos = 0;
|
396 |
} |
397 |
|
398 |
qemu_mod_timer(s->kbdtimer, qemu_get_clock(vm_clock) + ticks_per_sec / 32);
|
399 |
} |
400 |
|
401 |
static void spitz_keyboard_pre_map(SpitzKeyboardState *s) |
402 |
{ |
403 |
int i;
|
404 |
for (i = 0; i < 0x100; i ++) |
405 |
s->pre_map[i] = i; |
406 |
s->pre_map[0x02 | SHIFT ] = 0x02 | SHIFT; /* exclam */ |
407 |
s->pre_map[0x28 | SHIFT ] = 0x03 | SHIFT; /* quotedbl */ |
408 |
s->pre_map[0x04 | SHIFT ] = 0x04 | SHIFT; /* numbersign */ |
409 |
s->pre_map[0x05 | SHIFT ] = 0x05 | SHIFT; /* dollar */ |
410 |
s->pre_map[0x06 | SHIFT ] = 0x06 | SHIFT; /* percent */ |
411 |
s->pre_map[0x08 | SHIFT ] = 0x07 | SHIFT; /* ampersand */ |
412 |
s->pre_map[0x28 ] = 0x08 | SHIFT; /* apostrophe */ |
413 |
s->pre_map[0x0a | SHIFT ] = 0x09 | SHIFT; /* parenleft */ |
414 |
s->pre_map[0x0b | SHIFT ] = 0x0a | SHIFT; /* parenright */ |
415 |
s->pre_map[0x29 | SHIFT ] = 0x0b | SHIFT; /* asciitilde */ |
416 |
s->pre_map[0x03 | SHIFT ] = 0x0c | SHIFT; /* at */ |
417 |
s->pre_map[0xd3 ] = 0x0e | FN; /* Delete */ |
418 |
s->pre_map[0x3a ] = 0x0f | FN; /* Caps_Lock */ |
419 |
s->pre_map[0x07 | SHIFT ] = 0x11 | FN; /* asciicircum */ |
420 |
s->pre_map[0x0d ] = 0x12 | FN; /* equal */ |
421 |
s->pre_map[0x0d | SHIFT ] = 0x13 | FN; /* plus */ |
422 |
s->pre_map[0x1a ] = 0x14 | FN; /* bracketleft */ |
423 |
s->pre_map[0x1b ] = 0x15 | FN; /* bracketright */ |
424 |
s->pre_map[0x1a | SHIFT ] = 0x16 | FN; /* braceleft */ |
425 |
s->pre_map[0x1b | SHIFT ] = 0x17 | FN; /* braceright */ |
426 |
s->pre_map[0x27 ] = 0x22 | FN; /* semicolon */ |
427 |
s->pre_map[0x27 | SHIFT ] = 0x23 | FN; /* colon */ |
428 |
s->pre_map[0x09 | SHIFT ] = 0x24 | FN; /* asterisk */ |
429 |
s->pre_map[0x2b ] = 0x25 | FN; /* backslash */ |
430 |
s->pre_map[0x2b | SHIFT ] = 0x26 | FN; /* bar */ |
431 |
s->pre_map[0x0c | SHIFT ] = 0x30 | FN; /* underscore */ |
432 |
s->pre_map[0x33 | SHIFT ] = 0x33 | FN; /* less */ |
433 |
s->pre_map[0x35 ] = 0x33 | SHIFT; /* slash */ |
434 |
s->pre_map[0x34 | SHIFT ] = 0x34 | FN; /* greater */ |
435 |
s->pre_map[0x35 | SHIFT ] = 0x34 | SHIFT; /* question */ |
436 |
s->pre_map[0x49 ] = 0x48 | FN; /* Page_Up */ |
437 |
s->pre_map[0x51 ] = 0x50 | FN; /* Page_Down */ |
438 |
|
439 |
s->modifiers = 0;
|
440 |
s->imodifiers = 0;
|
441 |
s->fifopos = 0;
|
442 |
s->fifolen = 0;
|
443 |
s->kbdtimer = qemu_new_timer(vm_clock, spitz_keyboard_tick, s); |
444 |
spitz_keyboard_tick(s); |
445 |
} |
446 |
|
447 |
#undef SHIFT
|
448 |
#undef CTRL
|
449 |
#undef FN
|
450 |
|
451 |
static void spitz_keyboard_save(QEMUFile *f, void *opaque) |
452 |
{ |
453 |
SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
454 |
int i;
|
455 |
|
456 |
qemu_put_be16s(f, &s->sense_state); |
457 |
qemu_put_be16s(f, &s->strobe_state); |
458 |
for (i = 0; i < 5; i ++) |
459 |
qemu_put_byte(f, spitz_gpio_invert[i]); |
460 |
} |
461 |
|
462 |
static int spitz_keyboard_load(QEMUFile *f, void *opaque, int version_id) |
463 |
{ |
464 |
SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
465 |
int i;
|
466 |
|
467 |
qemu_get_be16s(f, &s->sense_state); |
468 |
qemu_get_be16s(f, &s->strobe_state); |
469 |
for (i = 0; i < 5; i ++) |
470 |
spitz_gpio_invert[i] = qemu_get_byte(f); |
471 |
|
472 |
/* Release all pressed keys */
|
473 |
memset(s->keyrow, 0, sizeof(s->keyrow)); |
474 |
spitz_keyboard_sense_update(s); |
475 |
s->modifiers = 0;
|
476 |
s->imodifiers = 0;
|
477 |
s->fifopos = 0;
|
478 |
s->fifolen = 0;
|
479 |
|
480 |
return 0; |
481 |
} |
482 |
|
483 |
static void spitz_keyboard_register(PXA2xxState *cpu) |
484 |
{ |
485 |
int i, j;
|
486 |
SpitzKeyboardState *s; |
487 |
|
488 |
s = (SpitzKeyboardState *) |
489 |
qemu_mallocz(sizeof(SpitzKeyboardState));
|
490 |
memset(s, 0, sizeof(SpitzKeyboardState)); |
491 |
|
492 |
for (i = 0; i < 0x80; i ++) |
493 |
s->keymap[i] = -1;
|
494 |
for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) |
495 |
for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) |
496 |
if (spitz_keymap[i][j] != -1) |
497 |
s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
|
498 |
|
499 |
for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) |
500 |
s->sense[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpio_key_sense[i]]; |
501 |
|
502 |
for (i = 0; i < 5; i ++) |
503 |
s->gpiomap[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpiomap[i]]; |
504 |
|
505 |
s->strobe = qemu_allocate_irqs(spitz_keyboard_strobe, s, |
506 |
SPITZ_KEY_STROBE_NUM); |
507 |
for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) |
508 |
pxa2xx_gpio_out_set(cpu->gpio, spitz_gpio_key_strobe[i], s->strobe[i]); |
509 |
|
510 |
spitz_keyboard_pre_map(s); |
511 |
qemu_add_kbd_event_handler((QEMUPutKBDEvent *) spitz_keyboard_handler, s); |
512 |
|
513 |
register_savevm("spitz_keyboard", 0, 0, |
514 |
spitz_keyboard_save, spitz_keyboard_load, s); |
515 |
} |
516 |
|
517 |
/* LCD backlight controller */
|
518 |
|
519 |
#define LCDTG_RESCTL 0x00 |
520 |
#define LCDTG_PHACTRL 0x01 |
521 |
#define LCDTG_DUTYCTRL 0x02 |
522 |
#define LCDTG_POWERREG0 0x03 |
523 |
#define LCDTG_POWERREG1 0x04 |
524 |
#define LCDTG_GPOR3 0x05 |
525 |
#define LCDTG_PICTRL 0x06 |
526 |
#define LCDTG_POLCTRL 0x07 |
527 |
|
528 |
static int bl_intensity, bl_power; |
529 |
|
530 |
static void spitz_bl_update(PXA2xxState *s) |
531 |
{ |
532 |
if (bl_power && bl_intensity)
|
533 |
zaurus_printf("LCD Backlight now at %i/63\n", bl_intensity);
|
534 |
else
|
535 |
zaurus_printf("LCD Backlight now off\n");
|
536 |
} |
537 |
|
538 |
static inline void spitz_bl_bit5(void *opaque, int line, int level) |
539 |
{ |
540 |
int prev = bl_intensity;
|
541 |
|
542 |
if (level)
|
543 |
bl_intensity &= ~0x20;
|
544 |
else
|
545 |
bl_intensity |= 0x20;
|
546 |
|
547 |
if (bl_power && prev != bl_intensity)
|
548 |
spitz_bl_update((PXA2xxState *) opaque); |
549 |
} |
550 |
|
551 |
static inline void spitz_bl_power(void *opaque, int line, int level) |
552 |
{ |
553 |
bl_power = !!level; |
554 |
spitz_bl_update((PXA2xxState *) opaque); |
555 |
} |
556 |
|
557 |
static void spitz_lcdtg_dac_put(void *opaque, uint8_t cmd) |
558 |
{ |
559 |
int addr, value;
|
560 |
addr = cmd >> 5;
|
561 |
value = cmd & 0x1f;
|
562 |
|
563 |
switch (addr) {
|
564 |
case LCDTG_RESCTL:
|
565 |
if (value)
|
566 |
zaurus_printf("LCD in QVGA mode\n");
|
567 |
else
|
568 |
zaurus_printf("LCD in VGA mode\n");
|
569 |
break;
|
570 |
|
571 |
case LCDTG_DUTYCTRL:
|
572 |
bl_intensity &= ~0x1f;
|
573 |
bl_intensity |= value; |
574 |
if (bl_power)
|
575 |
spitz_bl_update((PXA2xxState *) opaque); |
576 |
break;
|
577 |
|
578 |
case LCDTG_POWERREG0:
|
579 |
/* Set common voltage to M62332FP */
|
580 |
break;
|
581 |
} |
582 |
} |
583 |
|
584 |
/* SSP devices */
|
585 |
|
586 |
#define CORGI_SSP_PORT 2 |
587 |
|
588 |
#define SPITZ_GPIO_LCDCON_CS 53 |
589 |
#define SPITZ_GPIO_ADS7846_CS 14 |
590 |
#define SPITZ_GPIO_MAX1111_CS 20 |
591 |
#define SPITZ_GPIO_TP_INT 11 |
592 |
|
593 |
static int lcd_en, ads_en, max_en; |
594 |
static MAX111xState *max1111;
|
595 |
static ADS7846State *ads7846;
|
596 |
|
597 |
/* "Demux" the signal based on current chipselect */
|
598 |
static uint32_t corgi_ssp_read(void *opaque) |
599 |
{ |
600 |
if (lcd_en)
|
601 |
return 0; |
602 |
if (ads_en)
|
603 |
return ads7846_read(ads7846);
|
604 |
if (max_en)
|
605 |
return max111x_read(max1111);
|
606 |
return 0; |
607 |
} |
608 |
|
609 |
static void corgi_ssp_write(void *opaque, uint32_t value) |
610 |
{ |
611 |
if (lcd_en)
|
612 |
spitz_lcdtg_dac_put(opaque, value); |
613 |
if (ads_en)
|
614 |
ads7846_write(ads7846, value); |
615 |
if (max_en)
|
616 |
max111x_write(max1111, value); |
617 |
} |
618 |
|
619 |
static void corgi_ssp_gpio_cs(void *opaque, int line, int level) |
620 |
{ |
621 |
switch (line) {
|
622 |
case 0: |
623 |
lcd_en = !level; |
624 |
break;
|
625 |
case 1: |
626 |
ads_en = !level; |
627 |
break;
|
628 |
case 2: |
629 |
max_en = !level; |
630 |
break;
|
631 |
} |
632 |
} |
633 |
|
634 |
#define MAX1111_BATT_VOLT 1 |
635 |
#define MAX1111_BATT_TEMP 2 |
636 |
#define MAX1111_ACIN_VOLT 3 |
637 |
|
638 |
#define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ |
639 |
#define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ |
640 |
#define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ |
641 |
|
642 |
static void spitz_adc_temp_on(void *opaque, int line, int level) |
643 |
{ |
644 |
if (!max1111)
|
645 |
return;
|
646 |
|
647 |
if (level)
|
648 |
max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP); |
649 |
else
|
650 |
max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
|
651 |
} |
652 |
|
653 |
static void spitz_ssp_save(QEMUFile *f, void *opaque) |
654 |
{ |
655 |
qemu_put_be32(f, lcd_en); |
656 |
qemu_put_be32(f, ads_en); |
657 |
qemu_put_be32(f, max_en); |
658 |
qemu_put_be32(f, bl_intensity); |
659 |
qemu_put_be32(f, bl_power); |
660 |
} |
661 |
|
662 |
static int spitz_ssp_load(QEMUFile *f, void *opaque, int version_id) |
663 |
{ |
664 |
lcd_en = qemu_get_be32(f); |
665 |
ads_en = qemu_get_be32(f); |
666 |
max_en = qemu_get_be32(f); |
667 |
bl_intensity = qemu_get_be32(f); |
668 |
bl_power = qemu_get_be32(f); |
669 |
|
670 |
return 0; |
671 |
} |
672 |
|
673 |
static void spitz_ssp_attach(PXA2xxState *cpu) |
674 |
{ |
675 |
qemu_irq *chipselects; |
676 |
|
677 |
lcd_en = ads_en = max_en = 0;
|
678 |
|
679 |
ads7846 = ads7846_init(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_TP_INT]); |
680 |
|
681 |
max1111 = max1111_init(0);
|
682 |
max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT); |
683 |
max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
|
684 |
max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN); |
685 |
|
686 |
pxa2xx_ssp_attach(cpu->ssp[CORGI_SSP_PORT - 1], corgi_ssp_read,
|
687 |
corgi_ssp_write, cpu); |
688 |
|
689 |
chipselects = qemu_allocate_irqs(corgi_ssp_gpio_cs, cpu, 3);
|
690 |
pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_LCDCON_CS, chipselects[0]);
|
691 |
pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ADS7846_CS, chipselects[1]);
|
692 |
pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_MAX1111_CS, chipselects[2]);
|
693 |
|
694 |
bl_intensity = 0x20;
|
695 |
bl_power = 0;
|
696 |
|
697 |
register_savevm("spitz_ssp", 0, 0, spitz_ssp_save, spitz_ssp_load, cpu); |
698 |
} |
699 |
|
700 |
/* CF Microdrive */
|
701 |
|
702 |
static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) |
703 |
{ |
704 |
PCMCIACardState *md; |
705 |
int index;
|
706 |
BlockDriverState *bs; |
707 |
|
708 |
index = drive_get_index(IF_IDE, 0, 0); |
709 |
if (index == -1) |
710 |
return;
|
711 |
bs = drives_table[index].bdrv; |
712 |
if (bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {
|
713 |
md = dscm1xxxx_init(bs); |
714 |
pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); |
715 |
} |
716 |
} |
717 |
|
718 |
/* Wm8750 and Max7310 on I2C */
|
719 |
|
720 |
#define AKITA_MAX_ADDR 0x18 |
721 |
#define SPITZ_WM_ADDRL 0x1b |
722 |
#define SPITZ_WM_ADDRH 0x1a |
723 |
|
724 |
#define SPITZ_GPIO_WM 5 |
725 |
|
726 |
#ifdef HAS_AUDIO
|
727 |
static void spitz_wm8750_addr(void *opaque, int line, int level) |
728 |
{ |
729 |
i2c_slave *wm = (i2c_slave *) opaque; |
730 |
if (level)
|
731 |
i2c_set_slave_address(wm, SPITZ_WM_ADDRH); |
732 |
else
|
733 |
i2c_set_slave_address(wm, SPITZ_WM_ADDRL); |
734 |
} |
735 |
#endif
|
736 |
|
737 |
static void spitz_i2c_setup(PXA2xxState *cpu) |
738 |
{ |
739 |
/* Attach the CPU on one end of our I2C bus. */
|
740 |
i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
|
741 |
|
742 |
#ifdef HAS_AUDIO
|
743 |
i2c_slave *wm; |
744 |
|
745 |
/* Attach a WM8750 to the bus */
|
746 |
wm = wm8750_init(bus); |
747 |
|
748 |
spitz_wm8750_addr(wm, 0, 0); |
749 |
pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_WM, |
750 |
qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]); |
751 |
/* .. and to the sound interface. */
|
752 |
cpu->i2s->opaque = wm; |
753 |
cpu->i2s->codec_out = wm8750_dac_dat; |
754 |
cpu->i2s->codec_in = wm8750_adc_dat; |
755 |
wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); |
756 |
#endif
|
757 |
} |
758 |
|
759 |
static void spitz_akita_i2c_setup(PXA2xxState *cpu) |
760 |
{ |
761 |
/* Attach a Max7310 to Akita I2C bus. */
|
762 |
i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", |
763 |
AKITA_MAX_ADDR); |
764 |
} |
765 |
|
766 |
/* Other peripherals */
|
767 |
|
768 |
static void spitz_out_switch(void *opaque, int line, int level) |
769 |
{ |
770 |
switch (line) {
|
771 |
case 0: |
772 |
zaurus_printf("Charging %s.\n", level ? "off" : "on"); |
773 |
break;
|
774 |
case 1: |
775 |
zaurus_printf("Discharging %s.\n", level ? "on" : "off"); |
776 |
break;
|
777 |
case 2: |
778 |
zaurus_printf("Green LED %s.\n", level ? "on" : "off"); |
779 |
break;
|
780 |
case 3: |
781 |
zaurus_printf("Orange LED %s.\n", level ? "on" : "off"); |
782 |
break;
|
783 |
case 4: |
784 |
spitz_bl_bit5(opaque, line, level); |
785 |
break;
|
786 |
case 5: |
787 |
spitz_bl_power(opaque, line, level); |
788 |
break;
|
789 |
case 6: |
790 |
spitz_adc_temp_on(opaque, line, level); |
791 |
break;
|
792 |
} |
793 |
} |
794 |
|
795 |
#define SPITZ_SCP_LED_GREEN 1 |
796 |
#define SPITZ_SCP_JK_B 2 |
797 |
#define SPITZ_SCP_CHRG_ON 3 |
798 |
#define SPITZ_SCP_MUTE_L 4 |
799 |
#define SPITZ_SCP_MUTE_R 5 |
800 |
#define SPITZ_SCP_CF_POWER 6 |
801 |
#define SPITZ_SCP_LED_ORANGE 7 |
802 |
#define SPITZ_SCP_JK_A 8 |
803 |
#define SPITZ_SCP_ADC_TEMP_ON 9 |
804 |
#define SPITZ_SCP2_IR_ON 1 |
805 |
#define SPITZ_SCP2_AKIN_PULLUP 2 |
806 |
#define SPITZ_SCP2_BACKLIGHT_CONT 7 |
807 |
#define SPITZ_SCP2_BACKLIGHT_ON 8 |
808 |
#define SPITZ_SCP2_MIC_BIAS 9 |
809 |
|
810 |
static void spitz_scoop_gpio_setup(PXA2xxState *cpu, |
811 |
ScoopInfo *scp0, ScoopInfo *scp1) |
812 |
{ |
813 |
qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
|
814 |
|
815 |
scoop_gpio_out_set(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
|
816 |
scoop_gpio_out_set(scp0, SPITZ_SCP_JK_B, outsignals[1]);
|
817 |
scoop_gpio_out_set(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
|
818 |
scoop_gpio_out_set(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
|
819 |
|
820 |
if (scp1) {
|
821 |
scoop_gpio_out_set(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
|
822 |
scoop_gpio_out_set(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
|
823 |
} |
824 |
|
825 |
scoop_gpio_out_set(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
|
826 |
} |
827 |
|
828 |
#define SPITZ_GPIO_HSYNC 22 |
829 |
#define SPITZ_GPIO_SD_DETECT 9 |
830 |
#define SPITZ_GPIO_SD_WP 81 |
831 |
#define SPITZ_GPIO_ON_RESET 89 |
832 |
#define SPITZ_GPIO_BAT_COVER 90 |
833 |
#define SPITZ_GPIO_CF1_IRQ 105 |
834 |
#define SPITZ_GPIO_CF1_CD 94 |
835 |
#define SPITZ_GPIO_CF2_IRQ 106 |
836 |
#define SPITZ_GPIO_CF2_CD 93 |
837 |
|
838 |
static int spitz_hsync; |
839 |
|
840 |
static void spitz_lcd_hsync_handler(void *opaque, int line, int level) |
841 |
{ |
842 |
PXA2xxState *cpu = (PXA2xxState *) opaque; |
843 |
qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_HSYNC], spitz_hsync); |
844 |
spitz_hsync ^= 1;
|
845 |
} |
846 |
|
847 |
static void spitz_gpio_setup(PXA2xxState *cpu, int slots) |
848 |
{ |
849 |
qemu_irq lcd_hsync; |
850 |
/*
|
851 |
* Bad hack: We toggle the LCD hsync GPIO on every GPIO status
|
852 |
* read to satisfy broken guests that poll-wait for hsync.
|
853 |
* Simulating a real hsync event would be less practical and
|
854 |
* wouldn't guarantee that a guest ever exits the loop.
|
855 |
*/
|
856 |
spitz_hsync = 0;
|
857 |
lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0]; |
858 |
pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); |
859 |
pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); |
860 |
|
861 |
/* MMC/SD host */
|
862 |
pxa2xx_mmci_handlers(cpu->mmc, |
863 |
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP], |
864 |
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT]); |
865 |
|
866 |
/* Battery lock always closed */
|
867 |
qemu_irq_raise(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_BAT_COVER]); |
868 |
|
869 |
/* Handle reset */
|
870 |
pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset); |
871 |
|
872 |
/* PCMCIA signals: card's IRQ and Card-Detect */
|
873 |
if (slots >= 1) |
874 |
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
|
875 |
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_IRQ], |
876 |
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_CD]); |
877 |
if (slots >= 2) |
878 |
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
|
879 |
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_IRQ], |
880 |
pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_CD]); |
881 |
|
882 |
/* Initialise the screen rotation related signals */
|
883 |
spitz_gpio_invert[3] = 0; /* Always open */ |
884 |
if (graphic_rotate) { /* Tablet mode */ |
885 |
spitz_gpio_invert[4] = 0; |
886 |
} else { /* Portrait mode */ |
887 |
spitz_gpio_invert[4] = 1; |
888 |
} |
889 |
qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWA], |
890 |
spitz_gpio_invert[3]);
|
891 |
qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWB], |
892 |
spitz_gpio_invert[4]);
|
893 |
} |
894 |
|
895 |
/* Board init. */
|
896 |
enum spitz_model_e { spitz, akita, borzoi, terrier };
|
897 |
|
898 |
#define SPITZ_RAM 0x04000000 |
899 |
#define SPITZ_ROM 0x00800000 |
900 |
|
901 |
static struct arm_boot_info spitz_binfo = { |
902 |
.loader_start = PXA2XX_SDRAM_BASE, |
903 |
.ram_size = 0x04000000,
|
904 |
}; |
905 |
|
906 |
static void spitz_common_init(ram_addr_t ram_size, |
907 |
const char *kernel_filename, |
908 |
const char *kernel_cmdline, const char *initrd_filename, |
909 |
const char *cpu_model, enum spitz_model_e model, int arm_id) |
910 |
{ |
911 |
PXA2xxState *cpu; |
912 |
ScoopInfo *scp0, *scp1 = NULL;
|
913 |
|
914 |
if (!cpu_model)
|
915 |
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0"; |
916 |
|
917 |
/* Setup CPU & memory */
|
918 |
cpu = pxa270_init(spitz_binfo.ram_size, cpu_model); |
919 |
|
920 |
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M); |
921 |
|
922 |
cpu_register_physical_memory(0, SPITZ_ROM,
|
923 |
qemu_ram_alloc(SPITZ_ROM) | IO_MEM_ROM); |
924 |
|
925 |
/* Setup peripherals */
|
926 |
spitz_keyboard_register(cpu); |
927 |
|
928 |
spitz_ssp_attach(cpu); |
929 |
|
930 |
scp0 = scoop_init(cpu, 0, 0x10800000); |
931 |
if (model != akita) {
|
932 |
scp1 = scoop_init(cpu, 1, 0x08800040); |
933 |
} |
934 |
|
935 |
spitz_scoop_gpio_setup(cpu, scp0, scp1); |
936 |
|
937 |
spitz_gpio_setup(cpu, (model == akita) ? 1 : 2); |
938 |
|
939 |
spitz_i2c_setup(cpu); |
940 |
|
941 |
if (model == akita)
|
942 |
spitz_akita_i2c_setup(cpu); |
943 |
|
944 |
if (model == terrier)
|
945 |
/* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
|
946 |
spitz_microdrive_attach(cpu, 1);
|
947 |
else if (model != akita) |
948 |
/* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
|
949 |
spitz_microdrive_attach(cpu, 0);
|
950 |
|
951 |
/* Setup initial (reset) machine state */
|
952 |
cpu->env->regs[15] = spitz_binfo.loader_start;
|
953 |
|
954 |
spitz_binfo.kernel_filename = kernel_filename; |
955 |
spitz_binfo.kernel_cmdline = kernel_cmdline; |
956 |
spitz_binfo.initrd_filename = initrd_filename; |
957 |
spitz_binfo.board_id = arm_id; |
958 |
arm_load_kernel(cpu->env, &spitz_binfo); |
959 |
sl_bootparam_write(SL_PXA_PARAM_BASE); |
960 |
} |
961 |
|
962 |
static void spitz_init(ram_addr_t ram_size, |
963 |
const char *boot_device, |
964 |
const char *kernel_filename, const char *kernel_cmdline, |
965 |
const char *initrd_filename, const char *cpu_model) |
966 |
{ |
967 |
spitz_common_init(ram_size, kernel_filename, |
968 |
kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
|
969 |
} |
970 |
|
971 |
static void borzoi_init(ram_addr_t ram_size, |
972 |
const char *boot_device, |
973 |
const char *kernel_filename, const char *kernel_cmdline, |
974 |
const char *initrd_filename, const char *cpu_model) |
975 |
{ |
976 |
spitz_common_init(ram_size, kernel_filename, |
977 |
kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
|
978 |
} |
979 |
|
980 |
static void akita_init(ram_addr_t ram_size, |
981 |
const char *boot_device, |
982 |
const char *kernel_filename, const char *kernel_cmdline, |
983 |
const char *initrd_filename, const char *cpu_model) |
984 |
{ |
985 |
spitz_common_init(ram_size, kernel_filename, |
986 |
kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
|
987 |
} |
988 |
|
989 |
static void terrier_init(ram_addr_t ram_size, |
990 |
const char *boot_device, |
991 |
const char *kernel_filename, const char *kernel_cmdline, |
992 |
const char *initrd_filename, const char *cpu_model) |
993 |
{ |
994 |
spitz_common_init(ram_size, kernel_filename, |
995 |
kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
|
996 |
} |
997 |
|
998 |
QEMUMachine akitapda_machine = { |
999 |
.name = "akita",
|
1000 |
.desc = "Akita PDA (PXA270)",
|
1001 |
.init = akita_init, |
1002 |
}; |
1003 |
|
1004 |
QEMUMachine spitzpda_machine = { |
1005 |
.name = "spitz",
|
1006 |
.desc = "Spitz PDA (PXA270)",
|
1007 |
.init = spitz_init, |
1008 |
}; |
1009 |
|
1010 |
QEMUMachine borzoipda_machine = { |
1011 |
.name = "borzoi",
|
1012 |
.desc = "Borzoi PDA (PXA270)",
|
1013 |
.init = borzoi_init, |
1014 |
}; |
1015 |
|
1016 |
QEMUMachine terrierpda_machine = { |
1017 |
.name = "terrier",
|
1018 |
.desc = "Terrier PDA (PXA270)",
|
1019 |
.init = terrier_init, |
1020 |
}; |