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/*
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* Inter-VM Shared Memory PCI device.
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*
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* Author:
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* Cam Macdonell <cam@cs.ualberta.ca>
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*
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* Based On: cirrus_vga.c
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* Copyright (c) 2004 Fabrice Bellard
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* Copyright (c) 2004 Makoto Suzuki (suzu)
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*
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* and rtl8139.c
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* Copyright (c) 2006 Igor Kovalenko
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*
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* This code is licensed under the GNU GPL v2.
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*/
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#include "hw.h"
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#include "pc.h"
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#include "pci.h"
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#include "msix.h"
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#include "kvm.h"
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#include <sys/mman.h>
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#include <sys/types.h>
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#define IVSHMEM_IOEVENTFD 0
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#define IVSHMEM_MSI 1
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#define IVSHMEM_PEER 0
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#define IVSHMEM_MASTER 1
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#define IVSHMEM_REG_BAR_SIZE 0x100
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//#define DEBUG_IVSHMEM
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#ifdef DEBUG_IVSHMEM
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#define IVSHMEM_DPRINTF(fmt, ...) \
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do {printf("IVSHMEM: " fmt, ## __VA_ARGS__); } while (0)
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#else
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#define IVSHMEM_DPRINTF(fmt, ...)
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#endif
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typedef struct Peer {
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int nb_eventfds;
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int *eventfds;
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} Peer;
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typedef struct EventfdEntry {
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PCIDevice *pdev;
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int vector;
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} EventfdEntry;
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typedef struct IVShmemState {
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PCIDevice dev;
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uint32_t intrmask;
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uint32_t intrstatus;
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uint32_t doorbell;
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CharDriverState **eventfd_chr;
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CharDriverState *server_chr;
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int ivshmem_mmio_io_addr;
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pcibus_t mmio_addr;
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pcibus_t shm_pci_addr;
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uint64_t ivshmem_offset;
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uint64_t ivshmem_size; /* size of shared memory region */
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int shm_fd; /* shared memory file descriptor */
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Peer *peers;
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int nb_peers; /* how many guests we have space for */
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int max_peer; /* maximum numbered peer */
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int vm_id;
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uint32_t vectors;
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uint32_t features;
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EventfdEntry *eventfd_table;
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char * shmobj;
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char * sizearg;
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char * role;
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int role_val; /* scalar to avoid multiple string comparisons */
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} IVShmemState;
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/* registers for the Inter-VM shared memory device */
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enum ivshmem_registers {
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INTRMASK = 0,
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INTRSTATUS = 4,
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IVPOSITION = 8,
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DOORBELL = 12,
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};
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static inline uint32_t ivshmem_has_feature(IVShmemState *ivs,
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unsigned int feature) {
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return (ivs->features & (1 << feature));
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}
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static inline bool is_power_of_two(uint64_t x) {
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return (x & (x - 1)) == 0;
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}
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static void ivshmem_map(PCIDevice *pci_dev, int region_num,
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pcibus_t addr, pcibus_t size, int type)
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{
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IVShmemState *s = DO_UPCAST(IVShmemState, dev, pci_dev);
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s->shm_pci_addr = addr;
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if (s->ivshmem_offset > 0) {
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cpu_register_physical_memory(s->shm_pci_addr, s->ivshmem_size,
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s->ivshmem_offset);
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}
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IVSHMEM_DPRINTF("guest pci addr = %" FMT_PCIBUS ", guest h/w addr = %"
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PRIu64 ", size = %" FMT_PCIBUS "\n", addr, s->ivshmem_offset, size);
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}
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/* accessing registers - based on rtl8139 */
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static void ivshmem_update_irq(IVShmemState *s, int val)
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{
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int isr;
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isr = (s->intrstatus & s->intrmask) & 0xffffffff;
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/* don't print ISR resets */
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if (isr) {
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IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
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isr ? 1 : 0, s->intrstatus, s->intrmask);
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}
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qemu_set_irq(s->dev.irq[0], (isr != 0));
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}
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static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val)
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{
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IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
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s->intrmask = val;
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ivshmem_update_irq(s, val);
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}
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static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
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{
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uint32_t ret = s->intrmask;
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IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
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return ret;
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}
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static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val)
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{
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IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
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s->intrstatus = val;
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ivshmem_update_irq(s, val);
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return;
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}
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static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
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{
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uint32_t ret = s->intrstatus;
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/* reading ISR clears all interrupts */
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s->intrstatus = 0;
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ivshmem_update_irq(s, 0);
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return ret;
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}
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static void ivshmem_io_writew(void *opaque, target_phys_addr_t addr,
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uint32_t val)
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{
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IVSHMEM_DPRINTF("We shouldn't be writing words\n");
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}
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static void ivshmem_io_writel(void *opaque, target_phys_addr_t addr,
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uint32_t val)
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{
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IVShmemState *s = opaque;
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uint64_t write_one = 1;
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uint16_t dest = val >> 16;
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uint16_t vector = val & 0xff;
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addr &= 0xfc;
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IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr);
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switch (addr)
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{
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case INTRMASK:
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ivshmem_IntrMask_write(s, val);
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break;
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case INTRSTATUS:
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ivshmem_IntrStatus_write(s, val);
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break;
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case DOORBELL:
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/* check that dest VM ID is reasonable */
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if ((dest < 0) || (dest > s->max_peer)) {
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IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
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break;
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}
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/* check doorbell range */
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if ((vector >= 0) && (vector < s->peers[dest].nb_eventfds)) {
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IVSHMEM_DPRINTF("Writing %" PRId64 " to VM %d on vector %d\n",
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write_one, dest, vector);
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if (write(s->peers[dest].eventfds[vector],
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&(write_one), 8) != 8) {
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IVSHMEM_DPRINTF("error writing to eventfd\n");
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}
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}
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break;
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default:
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IVSHMEM_DPRINTF("Invalid VM Doorbell VM %d\n", dest);
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}
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}
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static void ivshmem_io_writeb(void *opaque, target_phys_addr_t addr,
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uint32_t val)
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{
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IVSHMEM_DPRINTF("We shouldn't be writing bytes\n");
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}
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static uint32_t ivshmem_io_readw(void *opaque, target_phys_addr_t addr)
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{
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IVSHMEM_DPRINTF("We shouldn't be reading words\n");
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return 0;
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}
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static uint32_t ivshmem_io_readl(void *opaque, target_phys_addr_t addr)
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{
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IVShmemState *s = opaque;
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uint32_t ret;
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switch (addr)
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{
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case INTRMASK:
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ret = ivshmem_IntrMask_read(s);
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break;
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case INTRSTATUS:
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ret = ivshmem_IntrStatus_read(s);
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break;
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case IVPOSITION:
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/* return my VM ID if the memory is mapped */
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if (s->shm_fd > 0) {
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ret = s->vm_id;
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} else {
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ret = -1;
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}
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break;
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default:
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IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr);
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ret = 0;
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}
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return ret;
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}
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static uint32_t ivshmem_io_readb(void *opaque, target_phys_addr_t addr)
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{
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IVSHMEM_DPRINTF("We shouldn't be reading bytes\n");
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return 0;
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}
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static CPUReadMemoryFunc * const ivshmem_mmio_read[3] = {
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ivshmem_io_readb,
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ivshmem_io_readw,
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ivshmem_io_readl,
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};
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static CPUWriteMemoryFunc * const ivshmem_mmio_write[3] = {
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ivshmem_io_writeb,
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ivshmem_io_writew,
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ivshmem_io_writel,
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};
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static void ivshmem_receive(void *opaque, const uint8_t *buf, int size)
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{
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IVShmemState *s = opaque;
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ivshmem_IntrStatus_write(s, *buf);
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IVSHMEM_DPRINTF("ivshmem_receive 0x%02x\n", *buf);
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}
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static int ivshmem_can_receive(void * opaque)
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{
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return 8;
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}
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static void ivshmem_event(void *opaque, int event)
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{
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IVSHMEM_DPRINTF("ivshmem_event %d\n", event);
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}
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static void fake_irqfd(void *opaque, const uint8_t *buf, int size) {
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EventfdEntry *entry = opaque;
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PCIDevice *pdev = entry->pdev;
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IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, entry->vector);
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msix_notify(pdev, entry->vector);
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}
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static CharDriverState* create_eventfd_chr_device(void * opaque, int eventfd,
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int vector)
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{
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/* create a event character device based on the passed eventfd */
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IVShmemState *s = opaque;
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CharDriverState * chr;
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chr = qemu_chr_open_eventfd(eventfd);
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if (chr == NULL) {
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fprintf(stderr, "creating eventfd for eventfd %d failed\n", eventfd);
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exit(-1);
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}
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/* if MSI is supported we need multiple interrupts */
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if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
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s->eventfd_table[vector].pdev = &s->dev;
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s->eventfd_table[vector].vector = vector;
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qemu_chr_add_handlers(chr, ivshmem_can_receive, fake_irqfd,
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ivshmem_event, &s->eventfd_table[vector]);
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} else {
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qemu_chr_add_handlers(chr, ivshmem_can_receive, ivshmem_receive,
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ivshmem_event, s);
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}
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return chr;
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}
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static int check_shm_size(IVShmemState *s, int fd) {
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/* check that the guest isn't going to try and map more memory than the
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* the object has allocated return -1 to indicate error */
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struct stat buf;
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350 |
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fstat(fd, &buf);
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if (s->ivshmem_size > buf.st_size) {
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fprintf(stderr, "IVSHMEM ERROR: Requested memory size greater");
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fprintf(stderr, " than shared object size (%" PRIu64 " > %ld)\n",
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s->ivshmem_size, buf.st_size);
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return -1;
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} else {
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return 0;
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}
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}
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362 |
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363 |
/* create the shared memory BAR when we are not using the server, so we can
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* create the BAR and map the memory immediately */
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365 |
static void create_shared_memory_BAR(IVShmemState *s, int fd) {
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366 |
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367 |
void * ptr;
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368 |
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s->shm_fd = fd;
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370 |
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ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
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372 |
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373 |
s->ivshmem_offset = qemu_ram_alloc_from_ptr(&s->dev.qdev, "ivshmem.bar2",
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s->ivshmem_size, ptr);
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375 |
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376 |
/* region for shared memory */
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pci_register_bar(&s->dev, 2, s->ivshmem_size,
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378 |
PCI_BASE_ADDRESS_SPACE_MEMORY, ivshmem_map);
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379 |
}
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|
380 |
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|
381 |
static void close_guest_eventfds(IVShmemState *s, int posn)
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382 |
{
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383 |
int i, guest_curr_max;
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384 |
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385 |
guest_curr_max = s->peers[posn].nb_eventfds;
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386 |
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387 |
for (i = 0; i < guest_curr_max; i++) {
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388 |
kvm_set_ioeventfd_mmio_long(s->peers[posn].eventfds[i],
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389 |
s->mmio_addr + DOORBELL, (posn << 16) | i, 0);
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390 |
close(s->peers[posn].eventfds[i]);
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391 |
}
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392 |
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393 |
qemu_free(s->peers[posn].eventfds);
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394 |
s->peers[posn].nb_eventfds = 0;
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395 |
}
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396 |
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397 |
static void setup_ioeventfds(IVShmemState *s) {
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398 |
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399 |
int i, j;
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400 |
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401 |
for (i = 0; i <= s->max_peer; i++) {
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402 |
for (j = 0; j < s->peers[i].nb_eventfds; j++) {
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403 |
kvm_set_ioeventfd_mmio_long(s->peers[i].eventfds[j],
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404 |
s->mmio_addr + DOORBELL, (i << 16) | j, 1);
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405 |
}
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|
406 |
}
|
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407 |
}
|
|
408 |
|
|
409 |
/* this function increase the dynamic storage need to store data about other
|
|
410 |
* guests */
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|
411 |
static void increase_dynamic_storage(IVShmemState *s, int new_min_size) {
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|
412 |
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|
413 |
int j, old_nb_alloc;
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|
414 |
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|
415 |
old_nb_alloc = s->nb_peers;
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|
416 |
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417 |
while (new_min_size >= s->nb_peers)
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418 |
s->nb_peers = s->nb_peers * 2;
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419 |
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420 |
IVSHMEM_DPRINTF("bumping storage to %d guests\n", s->nb_peers);
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421 |
s->peers = qemu_realloc(s->peers, s->nb_peers * sizeof(Peer));
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|
422 |
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|
423 |
/* zero out new pointers */
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424 |
for (j = old_nb_alloc; j < s->nb_peers; j++) {
|
|
425 |
s->peers[j].eventfds = NULL;
|
|
426 |
s->peers[j].nb_eventfds = 0;
|
|
427 |
}
|
|
428 |
}
|
|
429 |
|
|
430 |
static void ivshmem_read(void *opaque, const uint8_t * buf, int flags)
|
|
431 |
{
|
|
432 |
IVShmemState *s = opaque;
|
|
433 |
int incoming_fd, tmp_fd;
|
|
434 |
int guest_max_eventfd;
|
|
435 |
long incoming_posn;
|
|
436 |
|
|
437 |
memcpy(&incoming_posn, buf, sizeof(long));
|
|
438 |
/* pick off s->server_chr->msgfd and store it, posn should accompany msg */
|
|
439 |
tmp_fd = qemu_chr_get_msgfd(s->server_chr);
|
|
440 |
IVSHMEM_DPRINTF("posn is %ld, fd is %d\n", incoming_posn, tmp_fd);
|
|
441 |
|
|
442 |
/* make sure we have enough space for this guest */
|
|
443 |
if (incoming_posn >= s->nb_peers) {
|
|
444 |
increase_dynamic_storage(s, incoming_posn);
|
|
445 |
}
|
|
446 |
|
|
447 |
if (tmp_fd == -1) {
|
|
448 |
/* if posn is positive and unseen before then this is our posn*/
|
|
449 |
if ((incoming_posn >= 0) &&
|
|
450 |
(s->peers[incoming_posn].eventfds == NULL)) {
|
|
451 |
/* receive our posn */
|
|
452 |
s->vm_id = incoming_posn;
|
|
453 |
return;
|
|
454 |
} else {
|
|
455 |
/* otherwise an fd == -1 means an existing guest has gone away */
|
|
456 |
IVSHMEM_DPRINTF("posn %ld has gone away\n", incoming_posn);
|
|
457 |
close_guest_eventfds(s, incoming_posn);
|
|
458 |
return;
|
|
459 |
}
|
|
460 |
}
|
|
461 |
|
|
462 |
/* because of the implementation of get_msgfd, we need a dup */
|
|
463 |
incoming_fd = dup(tmp_fd);
|
|
464 |
|
|
465 |
if (incoming_fd == -1) {
|
|
466 |
fprintf(stderr, "could not allocate file descriptor %s\n",
|
|
467 |
strerror(errno));
|
|
468 |
return;
|
|
469 |
}
|
|
470 |
|
|
471 |
/* if the position is -1, then it's shared memory region fd */
|
|
472 |
if (incoming_posn == -1) {
|
|
473 |
|
|
474 |
void * map_ptr;
|
|
475 |
|
|
476 |
s->max_peer = 0;
|
|
477 |
|
|
478 |
if (check_shm_size(s, incoming_fd) == -1) {
|
|
479 |
exit(-1);
|
|
480 |
}
|
|
481 |
|
|
482 |
/* mmap the region and map into the BAR2 */
|
|
483 |
map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
|
|
484 |
incoming_fd, 0);
|
|
485 |
s->ivshmem_offset = qemu_ram_alloc_from_ptr(&s->dev.qdev,
|
|
486 |
"ivshmem.bar2", s->ivshmem_size, map_ptr);
|
|
487 |
|
|
488 |
IVSHMEM_DPRINTF("guest pci addr = %" FMT_PCIBUS ", guest h/w addr = %"
|
|
489 |
PRIu64 ", size = %" PRIu64 "\n", s->shm_pci_addr,
|
|
490 |
s->ivshmem_offset, s->ivshmem_size);
|
|
491 |
|
|
492 |
if (s->shm_pci_addr > 0) {
|
|
493 |
/* map memory into BAR2 */
|
|
494 |
cpu_register_physical_memory(s->shm_pci_addr, s->ivshmem_size,
|
|
495 |
s->ivshmem_offset);
|
|
496 |
}
|
|
497 |
|
|
498 |
/* only store the fd if it is successfully mapped */
|
|
499 |
s->shm_fd = incoming_fd;
|
|
500 |
|
|
501 |
return;
|
|
502 |
}
|
|
503 |
|
|
504 |
/* each guest has an array of eventfds, and we keep track of how many
|
|
505 |
* guests for each VM */
|
|
506 |
guest_max_eventfd = s->peers[incoming_posn].nb_eventfds;
|
|
507 |
|
|
508 |
if (guest_max_eventfd == 0) {
|
|
509 |
/* one eventfd per MSI vector */
|
|
510 |
s->peers[incoming_posn].eventfds = (int *) qemu_malloc(s->vectors *
|
|
511 |
sizeof(int));
|
|
512 |
}
|
|
513 |
|
|
514 |
/* this is an eventfd for a particular guest VM */
|
|
515 |
IVSHMEM_DPRINTF("eventfds[%ld][%d] = %d\n", incoming_posn,
|
|
516 |
guest_max_eventfd, incoming_fd);
|
|
517 |
s->peers[incoming_posn].eventfds[guest_max_eventfd] = incoming_fd;
|
|
518 |
|
|
519 |
/* increment count for particular guest */
|
|
520 |
s->peers[incoming_posn].nb_eventfds++;
|
|
521 |
|
|
522 |
/* keep track of the maximum VM ID */
|
|
523 |
if (incoming_posn > s->max_peer) {
|
|
524 |
s->max_peer = incoming_posn;
|
|
525 |
}
|
|
526 |
|
|
527 |
if (incoming_posn == s->vm_id) {
|
|
528 |
s->eventfd_chr[guest_max_eventfd] = create_eventfd_chr_device(s,
|
|
529 |
s->peers[s->vm_id].eventfds[guest_max_eventfd],
|
|
530 |
guest_max_eventfd);
|
|
531 |
}
|
|
532 |
|
|
533 |
if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
|
|
534 |
if (kvm_set_ioeventfd_mmio_long(incoming_fd, s->mmio_addr + DOORBELL,
|
|
535 |
(incoming_posn << 16) | guest_max_eventfd, 1) < 0) {
|
|
536 |
fprintf(stderr, "ivshmem: ioeventfd not available\n");
|
|
537 |
}
|
|
538 |
}
|
|
539 |
|
|
540 |
return;
|
|
541 |
}
|
|
542 |
|
|
543 |
static void ivshmem_reset(DeviceState *d)
|
|
544 |
{
|
|
545 |
IVShmemState *s = DO_UPCAST(IVShmemState, dev.qdev, d);
|
|
546 |
|
|
547 |
s->intrstatus = 0;
|
|
548 |
return;
|
|
549 |
}
|
|
550 |
|
|
551 |
static void ivshmem_mmio_map(PCIDevice *pci_dev, int region_num,
|
|
552 |
pcibus_t addr, pcibus_t size, int type)
|
|
553 |
{
|
|
554 |
IVShmemState *s = DO_UPCAST(IVShmemState, dev, pci_dev);
|
|
555 |
|
|
556 |
s->mmio_addr = addr;
|
|
557 |
cpu_register_physical_memory(addr + 0, IVSHMEM_REG_BAR_SIZE,
|
|
558 |
s->ivshmem_mmio_io_addr);
|
|
559 |
|
|
560 |
if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
|
|
561 |
setup_ioeventfds(s);
|
|
562 |
}
|
|
563 |
}
|
|
564 |
|
|
565 |
static uint64_t ivshmem_get_size(IVShmemState * s) {
|
|
566 |
|
|
567 |
uint64_t value;
|
|
568 |
char *ptr;
|
|
569 |
|
|
570 |
value = strtoull(s->sizearg, &ptr, 10);
|
|
571 |
switch (*ptr) {
|
|
572 |
case 0: case 'M': case 'm':
|
|
573 |
value <<= 20;
|
|
574 |
break;
|
|
575 |
case 'G': case 'g':
|
|
576 |
value <<= 30;
|
|
577 |
break;
|
|
578 |
default:
|
|
579 |
fprintf(stderr, "qemu: invalid ram size: %s\n", s->sizearg);
|
|
580 |
exit(1);
|
|
581 |
}
|
|
582 |
|
|
583 |
/* BARs must be a power of 2 */
|
|
584 |
if (!is_power_of_two(value)) {
|
|
585 |
fprintf(stderr, "ivshmem: size must be power of 2\n");
|
|
586 |
exit(1);
|
|
587 |
}
|
|
588 |
|
|
589 |
return value;
|
|
590 |
}
|
|
591 |
|
|
592 |
static void ivshmem_setup_msi(IVShmemState * s) {
|
|
593 |
|
|
594 |
int i;
|
|
595 |
|
|
596 |
/* allocate the MSI-X vectors */
|
|
597 |
|
|
598 |
if (!msix_init(&s->dev, s->vectors, 1, 0)) {
|
|
599 |
pci_register_bar(&s->dev, 1,
|
|
600 |
msix_bar_size(&s->dev),
|
|
601 |
PCI_BASE_ADDRESS_SPACE_MEMORY,
|
|
602 |
msix_mmio_map);
|
|
603 |
IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
|
|
604 |
} else {
|
|
605 |
IVSHMEM_DPRINTF("msix initialization failed\n");
|
|
606 |
exit(1);
|
|
607 |
}
|
|
608 |
|
|
609 |
/* 'activate' the vectors */
|
|
610 |
for (i = 0; i < s->vectors; i++) {
|
|
611 |
msix_vector_use(&s->dev, i);
|
|
612 |
}
|
|
613 |
|
|
614 |
/* allocate Qemu char devices for receiving interrupts */
|
|
615 |
s->eventfd_table = qemu_mallocz(s->vectors * sizeof(EventfdEntry));
|
|
616 |
}
|
|
617 |
|
|
618 |
static void ivshmem_save(QEMUFile* f, void *opaque)
|
|
619 |
{
|
|
620 |
IVShmemState *proxy = opaque;
|
|
621 |
|
|
622 |
IVSHMEM_DPRINTF("ivshmem_save\n");
|
|
623 |
pci_device_save(&proxy->dev, f);
|
|
624 |
|
|
625 |
if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
|
|
626 |
msix_save(&proxy->dev, f);
|
|
627 |
} else {
|
|
628 |
qemu_put_be32(f, proxy->intrstatus);
|
|
629 |
qemu_put_be32(f, proxy->intrmask);
|
|
630 |
}
|
|
631 |
|
|
632 |
}
|
|
633 |
|
|
634 |
static int ivshmem_load(QEMUFile* f, void *opaque, int version_id)
|
|
635 |
{
|
|
636 |
IVSHMEM_DPRINTF("ivshmem_load\n");
|
|
637 |
|
|
638 |
IVShmemState *proxy = opaque;
|
|
639 |
int ret, i;
|
|
640 |
|
|
641 |
if (version_id > 0) {
|
|
642 |
return -EINVAL;
|
|
643 |
}
|
|
644 |
|
|
645 |
if (proxy->role_val == IVSHMEM_PEER) {
|
|
646 |
fprintf(stderr, "ivshmem: 'peer' devices are not migratable\n");
|
|
647 |
return -EINVAL;
|
|
648 |
}
|
|
649 |
|
|
650 |
ret = pci_device_load(&proxy->dev, f);
|
|
651 |
if (ret) {
|
|
652 |
return ret;
|
|
653 |
}
|
|
654 |
|
|
655 |
if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
|
|
656 |
msix_load(&proxy->dev, f);
|
|
657 |
for (i = 0; i < proxy->vectors; i++) {
|
|
658 |
msix_vector_use(&proxy->dev, i);
|
|
659 |
}
|
|
660 |
} else {
|
|
661 |
proxy->intrstatus = qemu_get_be32(f);
|
|
662 |
proxy->intrmask = qemu_get_be32(f);
|
|
663 |
}
|
|
664 |
|
|
665 |
return 0;
|
|
666 |
}
|
|
667 |
|
|
668 |
static int pci_ivshmem_init(PCIDevice *dev)
|
|
669 |
{
|
|
670 |
IVShmemState *s = DO_UPCAST(IVShmemState, dev, dev);
|
|
671 |
uint8_t *pci_conf;
|
|
672 |
|
|
673 |
if (s->sizearg == NULL)
|
|
674 |
s->ivshmem_size = 4 << 20; /* 4 MB default */
|
|
675 |
else {
|
|
676 |
s->ivshmem_size = ivshmem_get_size(s);
|
|
677 |
}
|
|
678 |
|
|
679 |
register_savevm(&s->dev.qdev, "ivshmem", 0, 0, ivshmem_save, ivshmem_load,
|
|
680 |
dev);
|
|
681 |
|
|
682 |
/* IRQFD requires MSI */
|
|
683 |
if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
|
|
684 |
!ivshmem_has_feature(s, IVSHMEM_MSI)) {
|
|
685 |
fprintf(stderr, "ivshmem: ioeventfd/irqfd requires MSI\n");
|
|
686 |
exit(1);
|
|
687 |
}
|
|
688 |
|
|
689 |
/* check that role is reasonable */
|
|
690 |
if (s->role) {
|
|
691 |
if (strncmp(s->role, "peer", 5) == 0) {
|
|
692 |
s->role_val = IVSHMEM_PEER;
|
|
693 |
} else if (strncmp(s->role, "master", 7) == 0) {
|
|
694 |
s->role_val = IVSHMEM_MASTER;
|
|
695 |
} else {
|
|
696 |
fprintf(stderr, "ivshmem: 'role' must be 'peer' or 'master'\n");
|
|
697 |
exit(1);
|
|
698 |
}
|
|
699 |
} else {
|
|
700 |
s->role_val = IVSHMEM_MASTER; /* default */
|
|
701 |
}
|
|
702 |
|
|
703 |
if (s->role_val == IVSHMEM_PEER) {
|
|
704 |
register_device_unmigratable(&s->dev.qdev, "ivshmem", s);
|
|
705 |
}
|
|
706 |
|
|
707 |
pci_conf = s->dev.config;
|
|
708 |
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REDHAT_QUMRANET);
|
|
709 |
pci_conf[0x02] = 0x10;
|
|
710 |
pci_conf[0x03] = 0x11;
|
|
711 |
pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
|
|
712 |
pci_config_set_class(pci_conf, PCI_CLASS_MEMORY_RAM);
|
|
713 |
pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
|
|
714 |
|
|
715 |
pci_config_set_interrupt_pin(pci_conf, 1);
|
|
716 |
|
|
717 |
s->shm_pci_addr = 0;
|
|
718 |
s->ivshmem_offset = 0;
|
|
719 |
s->shm_fd = 0;
|
|
720 |
|
|
721 |
s->ivshmem_mmio_io_addr = cpu_register_io_memory(ivshmem_mmio_read,
|
|
722 |
ivshmem_mmio_write, s);
|
|
723 |
/* region for registers*/
|
|
724 |
pci_register_bar(&s->dev, 0, IVSHMEM_REG_BAR_SIZE,
|
|
725 |
PCI_BASE_ADDRESS_SPACE_MEMORY, ivshmem_mmio_map);
|
|
726 |
|
|
727 |
if ((s->server_chr != NULL) &&
|
|
728 |
(strncmp(s->server_chr->filename, "unix:", 5) == 0)) {
|
|
729 |
/* if we get a UNIX socket as the parameter we will talk
|
|
730 |
* to the ivshmem server to receive the memory region */
|
|
731 |
|
|
732 |
if (s->shmobj != NULL) {
|
|
733 |
fprintf(stderr, "WARNING: do not specify both 'chardev' "
|
|
734 |
"and 'shm' with ivshmem\n");
|
|
735 |
}
|
|
736 |
|
|
737 |
IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
|
|
738 |
s->server_chr->filename);
|
|
739 |
|
|
740 |
if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
|
|
741 |
ivshmem_setup_msi(s);
|
|
742 |
}
|
|
743 |
|
|
744 |
/* we allocate enough space for 16 guests and grow as needed */
|
|
745 |
s->nb_peers = 16;
|
|
746 |
s->vm_id = -1;
|
|
747 |
|
|
748 |
/* allocate/initialize space for interrupt handling */
|
|
749 |
s->peers = qemu_mallocz(s->nb_peers * sizeof(Peer));
|
|
750 |
|
|
751 |
pci_register_bar(&s->dev, 2, s->ivshmem_size,
|
|
752 |
PCI_BASE_ADDRESS_SPACE_MEMORY, ivshmem_map);
|
|
753 |
|
|
754 |
s->eventfd_chr = qemu_mallocz(s->vectors * sizeof(CharDriverState *));
|
|
755 |
|
|
756 |
qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive, ivshmem_read,
|
|
757 |
ivshmem_event, s);
|
|
758 |
} else {
|
|
759 |
/* just map the file immediately, we're not using a server */
|
|
760 |
int fd;
|
|
761 |
|
|
762 |
if (s->shmobj == NULL) {
|
|
763 |
fprintf(stderr, "Must specify 'chardev' or 'shm' to ivshmem\n");
|
|
764 |
}
|
|
765 |
|
|
766 |
IVSHMEM_DPRINTF("using shm_open (shm object = %s)\n", s->shmobj);
|
|
767 |
|
|
768 |
/* try opening with O_EXCL and if it succeeds zero the memory
|
|
769 |
* by truncating to 0 */
|
|
770 |
if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR|O_EXCL,
|
|
771 |
S_IRWXU|S_IRWXG|S_IRWXO)) > 0) {
|
|
772 |
/* truncate file to length PCI device's memory */
|
|
773 |
if (ftruncate(fd, s->ivshmem_size) != 0) {
|
|
774 |
fprintf(stderr, "ivshmem: could not truncate shared file\n");
|
|
775 |
}
|
|
776 |
|
|
777 |
} else if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR,
|
|
778 |
S_IRWXU|S_IRWXG|S_IRWXO)) < 0) {
|
|
779 |
fprintf(stderr, "ivshmem: could not open shared file\n");
|
|
780 |
exit(-1);
|
|
781 |
|
|
782 |
}
|
|
783 |
|
|
784 |
if (check_shm_size(s, fd) == -1) {
|
|
785 |
exit(-1);
|
|
786 |
}
|
|
787 |
|
|
788 |
create_shared_memory_BAR(s, fd);
|
|
789 |
|
|
790 |
}
|
|
791 |
|
|
792 |
return 0;
|
|
793 |
}
|
|
794 |
|
|
795 |
static int pci_ivshmem_uninit(PCIDevice *dev)
|
|
796 |
{
|
|
797 |
IVShmemState *s = DO_UPCAST(IVShmemState, dev, dev);
|
|
798 |
|
|
799 |
cpu_unregister_io_memory(s->ivshmem_mmio_io_addr);
|
|
800 |
unregister_savevm(&dev->qdev, "ivshmem", s);
|
|
801 |
|
|
802 |
return 0;
|
|
803 |
}
|
|
804 |
|
|
805 |
static PCIDeviceInfo ivshmem_info = {
|
|
806 |
.qdev.name = "ivshmem",
|
|
807 |
.qdev.size = sizeof(IVShmemState),
|
|
808 |
.qdev.reset = ivshmem_reset,
|
|
809 |
.init = pci_ivshmem_init,
|
|
810 |
.exit = pci_ivshmem_uninit,
|
|
811 |
.qdev.props = (Property[]) {
|
|
812 |
DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
|
|
813 |
DEFINE_PROP_STRING("size", IVShmemState, sizearg),
|
|
814 |
DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
|
|
815 |
DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, false),
|
|
816 |
DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
|
|
817 |
DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
|
|
818 |
DEFINE_PROP_STRING("role", IVShmemState, role),
|
|
819 |
DEFINE_PROP_END_OF_LIST(),
|
|
820 |
}
|
|
821 |
};
|
|
822 |
|
|
823 |
static void ivshmem_register_devices(void)
|
|
824 |
{
|
|
825 |
pci_qdev_register(&ivshmem_info);
|
|
826 |
}
|
|
827 |
|
|
828 |
device_init(ivshmem_register_devices)
|