Revision 6d5f237a target-sparc/cpu.h
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/* MMU */ |
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#define MMU_E (1<<0) |
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#define MMU_NF (1<<1) |
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#define MMU_BM (1<<14) |
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#define PTE_ENTRYTYPE_MASK 3 |
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#define PTE_ACCESS_MASK 0x1c |
| ... | ... | |
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int interrupt_index; |
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int interrupt_request; |
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int halted; |
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uint32_t mmu_bm; |
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/* NOTE: we allow 8 more registers to handle wrapping */ |
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target_ulong regbase[NWINDOWS * 16 + 8]; |
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