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Revision 6e2fe79d

ID6e2fe79da8853352e1cd401f86974c26b91ba3c8

Added by Blue Swirl almost 12 years ago

Merge branch 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm

  • 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
    target-arm: Add support for long format translation table walks
    target-arm: Implement TTBCR changes for LPAE
    target-arm: Implement long-descriptor PAR format
    target-arm: Use target_phys_addr_t in get_phys_addr()
    target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAE
    target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAE
    target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers
    target-arm: Extend feature flags to 64 bits
    target-arm: Implement privileged-execute-never (PXN)
    ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits
    hw/imx_avic.c: Avoid format error when target_phys_addr_t is 64 bits
    target-arm: Fix TCG temp handling in 64 bit cp writes
    target-arm: Fix some copy-and-paste errors in cp register names
    target-arm: Fix typo that meant TTBR1 accesses went to TTBR0
    target-arm: Fix CP15 based WFI

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