Revision 6e473128 target-mips/cpu.h
b/target-mips/cpu.h | ||
---|---|---|
260 | 260 |
#define MIPS_HFLAG_UM 0x0001 /* user mode */ |
261 | 261 |
#define MIPS_HFLAG_DM 0x0008 /* Debug mode */ |
262 | 262 |
#define MIPS_HFLAG_SM 0x0010 /* Supervisor mode */ |
263 |
#define MIPS_HFLAG_64 0x0020 /* 64-bit instructions enabled */ |
|
263 | 264 |
#define MIPS_HFLAG_RE 0x0040 /* Reversed endianness */ |
264 | 265 |
/* If translation is interrupted between the branch instruction and |
265 | 266 |
* the delay slot, record what type of branch it is so that we can |
Also available in: Unified diff