Revision 6ebbf390 cpu-exec.c
b/cpu-exec.c | ||
---|---|---|
884 | 884 |
} |
885 | 885 |
|
886 | 886 |
/* see if it is an MMU fault */ |
887 |
ret = cpu_x86_handle_mmu_fault(env, address, is_write, |
|
888 |
((env->hflags & HF_CPL_MASK) == 3), 0); |
|
887 |
ret = cpu_x86_handle_mmu_fault(env, address, is_write, MMU_USER_IDX, 0); |
|
889 | 888 |
if (ret < 0) |
890 | 889 |
return 0; /* not an MMU fault */ |
891 | 890 |
if (ret == 0) |
... | ... | |
934 | 933 |
return 1; |
935 | 934 |
} |
936 | 935 |
/* see if it is an MMU fault */ |
937 |
ret = cpu_arm_handle_mmu_fault(env, address, is_write, 1, 0);
|
|
936 |
ret = cpu_arm_handle_mmu_fault(env, address, is_write, MMU_USER_IDX, 0);
|
|
938 | 937 |
if (ret < 0) |
939 | 938 |
return 0; /* not an MMU fault */ |
940 | 939 |
if (ret == 0) |
... | ... | |
970 | 969 |
return 1; |
971 | 970 |
} |
972 | 971 |
/* see if it is an MMU fault */ |
973 |
ret = cpu_sparc_handle_mmu_fault(env, address, is_write, 1, 0);
|
|
972 |
ret = cpu_sparc_handle_mmu_fault(env, address, is_write, MMU_USER_IDX, 0);
|
|
974 | 973 |
if (ret < 0) |
975 | 974 |
return 0; /* not an MMU fault */ |
976 | 975 |
if (ret == 0) |
... | ... | |
1007 | 1006 |
} |
1008 | 1007 |
|
1009 | 1008 |
/* see if it is an MMU fault */ |
1010 |
ret = cpu_ppc_handle_mmu_fault(env, address, is_write, msr_pr, 0);
|
|
1009 |
ret = cpu_ppc_handle_mmu_fault(env, address, is_write, MMU_USER_IDX, 0);
|
|
1011 | 1010 |
if (ret < 0) |
1012 | 1011 |
return 0; /* not an MMU fault */ |
1013 | 1012 |
if (ret == 0) |
... | ... | |
1056 | 1055 |
return 1; |
1057 | 1056 |
} |
1058 | 1057 |
/* see if it is an MMU fault */ |
1059 |
ret = cpu_m68k_handle_mmu_fault(env, address, is_write, 1, 0);
|
|
1058 |
ret = cpu_m68k_handle_mmu_fault(env, address, is_write, MMU_USER_IDX, 0);
|
|
1060 | 1059 |
if (ret < 0) |
1061 | 1060 |
return 0; /* not an MMU fault */ |
1062 | 1061 |
if (ret == 0) |
... | ... | |
1096 | 1095 |
} |
1097 | 1096 |
|
1098 | 1097 |
/* see if it is an MMU fault */ |
1099 |
ret = cpu_mips_handle_mmu_fault(env, address, is_write, 1, 0);
|
|
1098 |
ret = cpu_mips_handle_mmu_fault(env, address, is_write, MMU_USER_IDX, 0);
|
|
1100 | 1099 |
if (ret < 0) |
1101 | 1100 |
return 0; /* not an MMU fault */ |
1102 | 1101 |
if (ret == 0) |
... | ... | |
1146 | 1145 |
} |
1147 | 1146 |
|
1148 | 1147 |
/* see if it is an MMU fault */ |
1149 |
ret = cpu_sh4_handle_mmu_fault(env, address, is_write, 1, 0);
|
|
1148 |
ret = cpu_sh4_handle_mmu_fault(env, address, is_write, MMU_USER_IDX, 0);
|
|
1150 | 1149 |
if (ret < 0) |
1151 | 1150 |
return 0; /* not an MMU fault */ |
1152 | 1151 |
if (ret == 0) |
... | ... | |
1191 | 1190 |
} |
1192 | 1191 |
|
1193 | 1192 |
/* see if it is an MMU fault */ |
1194 |
ret = cpu_alpha_handle_mmu_fault(env, address, is_write, 1, 0);
|
|
1193 |
ret = cpu_alpha_handle_mmu_fault(env, address, is_write, MMU_USER_IDX, 0);
|
|
1195 | 1194 |
if (ret < 0) |
1196 | 1195 |
return 0; /* not an MMU fault */ |
1197 | 1196 |
if (ret == 0) |
... | ... | |
1235 | 1234 |
} |
1236 | 1235 |
|
1237 | 1236 |
/* see if it is an MMU fault */ |
1238 |
ret = cpu_cris_handle_mmu_fault(env, address, is_write, 1, 0);
|
|
1237 |
ret = cpu_cris_handle_mmu_fault(env, address, is_write, MMU_USER_IDX, 0);
|
|
1239 | 1238 |
if (ret < 0) |
1240 | 1239 |
return 0; /* not an MMU fault */ |
1241 | 1240 |
if (ret == 0) |
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