Revision 6ebf5905 hw/pci_host.c
b/hw/pci_host.c | ||
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78 | 78 |
return val; |
79 | 79 |
} |
80 | 80 |
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static void pci_host_config_write_swap(ReadWriteHandler *handler,
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pcibus_t addr, uint32_t val, int len)
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static void pci_host_config_write(ReadWriteHandler *handler, |
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pcibus_t addr, uint32_t val, int len) |
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83 | 83 |
{ |
84 | 84 |
PCIHostState *s = container_of(handler, PCIHostState, conf_handler); |
85 | 85 |
|
86 | 86 |
PCI_DPRINTF("%s addr %" FMT_PCIBUS " %d val %"PRIx32"\n", |
87 | 87 |
__func__, addr, len, val); |
88 |
val = qemu_bswap_len(val, len); |
|
89 | 88 |
s->config_reg = val; |
90 | 89 |
} |
91 | 90 |
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static uint32_t pci_host_config_read_swap(ReadWriteHandler *handler,
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pcibus_t addr, int len)
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static uint32_t pci_host_config_read(ReadWriteHandler *handler, |
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pcibus_t addr, int len) |
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94 | 93 |
{ |
95 | 94 |
PCIHostState *s = container_of(handler, PCIHostState, conf_handler); |
96 | 95 |
uint32_t val = s->config_reg; |
97 | 96 |
|
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val = qemu_bswap_len(val, len); |
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99 | 97 |
PCI_DPRINTF("%s addr %" FMT_PCIBUS " len %d val %"PRIx32"\n", |
100 | 98 |
__func__, addr, len, val); |
101 | 99 |
return val; |
102 | 100 |
} |
103 | 101 |
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static void pci_host_config_write_noswap(ReadWriteHandler *handler, |
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pcibus_t addr, uint32_t val, int len) |
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{ |
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PCIHostState *s = container_of(handler, PCIHostState, conf_noswap_handler); |
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PCI_DPRINTF("%s addr %" FMT_PCIBUS " %d val %"PRIx32"\n", |
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__func__, addr, len, val); |
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s->config_reg = val; |
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} |
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static uint32_t pci_host_config_read_noswap(ReadWriteHandler *handler, |
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pcibus_t addr, int len) |
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{ |
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PCIHostState *s = container_of(handler, PCIHostState, conf_noswap_handler); |
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uint32_t val = s->config_reg; |
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PCI_DPRINTF("%s addr %" FMT_PCIBUS " len %d val %"PRIx32"\n", |
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__func__, addr, len, val); |
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return val; |
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} |
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static void pci_host_data_write_swap(ReadWriteHandler *handler, |
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pcibus_t addr, uint32_t val, int len) |
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static void pci_host_data_write(ReadWriteHandler *handler, |
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pcibus_t addr, uint32_t val, int len) |
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127 | 104 |
{ |
128 | 105 |
PCIHostState *s = container_of(handler, PCIHostState, data_handler); |
129 |
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val = qemu_bswap_len(val, len); |
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131 | 106 |
PCI_DPRINTF("write addr %" FMT_PCIBUS " len %d val %x\n", |
132 | 107 |
addr, len, val); |
133 | 108 |
if (s->config_reg & (1u << 31)) |
134 | 109 |
pci_data_write(s->bus, s->config_reg | (addr & 3), val, len); |
135 | 110 |
} |
136 | 111 |
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static uint32_t pci_host_data_read_swap(ReadWriteHandler *handler,
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pcibus_t addr, int len)
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static uint32_t pci_host_data_read(ReadWriteHandler *handler, |
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pcibus_t addr, int len) |
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139 | 114 |
{ |
140 | 115 |
PCIHostState *s = container_of(handler, PCIHostState, data_handler); |
141 | 116 |
uint32_t val; |
... | ... | |
144 | 119 |
val = pci_data_read(s->bus, s->config_reg | (addr & 3), len); |
145 | 120 |
PCI_DPRINTF("read addr %" FMT_PCIBUS " len %d val %x\n", |
146 | 121 |
addr, len, val); |
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val = qemu_bswap_len(val, len); |
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return val; |
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} |
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static void pci_host_data_write_noswap(ReadWriteHandler *handler, |
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pcibus_t addr, uint32_t val, int len) |
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{ |
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PCIHostState *s = container_of(handler, PCIHostState, data_noswap_handler); |
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PCI_DPRINTF("write addr %" FMT_PCIBUS " len %d val %x\n", |
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addr, len, val); |
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if (s->config_reg & (1u << 31)) |
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pci_data_write(s->bus, s->config_reg | (addr & 3), val, len); |
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} |
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static uint32_t pci_host_data_read_noswap(ReadWriteHandler *handler, |
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pcibus_t addr, int len) |
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{ |
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PCIHostState *s = container_of(handler, PCIHostState, data_noswap_handler); |
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uint32_t val; |
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if (!(s->config_reg & (1 << 31))) |
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return 0xffffffff; |
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val = pci_data_read(s->bus, s->config_reg | (addr & 3), len); |
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PCI_DPRINTF("read addr %" FMT_PCIBUS " len %d val %x\n", |
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addr, len, val); |
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171 | 122 |
return val; |
172 | 123 |
} |
173 | 124 |
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174 | 125 |
static void pci_host_init(PCIHostState *s) |
175 | 126 |
{ |
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s->conf_handler.write = pci_host_config_write_swap; |
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s->conf_handler.read = pci_host_config_read_swap; |
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s->conf_noswap_handler.write = pci_host_config_write_noswap; |
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s->conf_noswap_handler.read = pci_host_config_read_noswap; |
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s->data_handler.write = pci_host_data_write_swap; |
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s->data_handler.read = pci_host_data_read_swap; |
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s->data_noswap_handler.write = pci_host_data_write_noswap; |
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s->data_noswap_handler.read = pci_host_data_read_noswap; |
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s->conf_handler.write = pci_host_config_write; |
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s->conf_handler.read = pci_host_config_read; |
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s->data_handler.write = pci_host_data_write; |
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s->data_handler.read = pci_host_data_read; |
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184 | 131 |
} |
185 | 132 |
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int pci_host_conf_register_mmio(PCIHostState *s, int swap)
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int pci_host_conf_register_mmio(PCIHostState *s, int endian)
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187 | 134 |
{ |
188 | 135 |
pci_host_init(s); |
189 |
if (swap) { |
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return cpu_register_io_memory_simple(&s->conf_handler, |
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DEVICE_NATIVE_ENDIAN); |
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} else { |
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return cpu_register_io_memory_simple(&s->conf_noswap_handler, |
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DEVICE_NATIVE_ENDIAN); |
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} |
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return cpu_register_io_memory_simple(&s->conf_handler, endian); |
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196 | 137 |
} |
197 | 138 |
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198 | 139 |
void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s) |
199 | 140 |
{ |
200 | 141 |
pci_host_init(s); |
201 |
register_ioport_simple(&s->conf_noswap_handler, ioport, 4, 4);
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register_ioport_simple(&s->conf_handler, ioport, 4, 4); |
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202 | 143 |
} |
203 | 144 |
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int pci_host_data_register_mmio(PCIHostState *s, int swap)
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int pci_host_data_register_mmio(PCIHostState *s, int endian)
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205 | 146 |
{ |
206 | 147 |
pci_host_init(s); |
207 |
if (swap) { |
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return cpu_register_io_memory_simple(&s->data_handler, |
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DEVICE_NATIVE_ENDIAN); |
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} else { |
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return cpu_register_io_memory_simple(&s->data_noswap_handler, |
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DEVICE_NATIVE_ENDIAN); |
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} |
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return cpu_register_io_memory_simple(&s->data_handler, endian); |
|
214 | 149 |
} |
215 | 150 |
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216 | 151 |
void pci_host_data_register_ioport(pio_addr_t ioport, PCIHostState *s) |
217 | 152 |
{ |
218 | 153 |
pci_host_init(s); |
219 |
register_ioport_simple(&s->data_noswap_handler, ioport, 4, 1);
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register_ioport_simple(&s->data_noswap_handler, ioport, 4, 2);
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register_ioport_simple(&s->data_noswap_handler, ioport, 4, 4);
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register_ioport_simple(&s->data_handler, ioport, 4, 1); |
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register_ioport_simple(&s->data_handler, ioport, 4, 2); |
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register_ioport_simple(&s->data_handler, ioport, 4, 4); |
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222 | 157 |
} |
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