Revision 6ec85236

b/tcg/ppc/tcg-target.c
24 24

  
25 25
static uint8_t *tb_ret_addr;
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#ifdef __APPLE__
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#ifdef _CALL_DARWIN
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#define LINKAGE_AREA_SIZE 24
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#define LR_OFFSET 8
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#elif defined _AIX
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#elif defined _CALL_AIX
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#define LINKAGE_AREA_SIZE 52
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#define LR_OFFSET 8
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#else
......
104 104
    TCG_REG_R29,
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    TCG_REG_R30,
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    TCG_REG_R31,
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#ifdef __APPLE__
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#ifdef _CALL_DARWIN
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    TCG_REG_R2,
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#endif
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    TCG_REG_R3,
......
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    TCG_REG_R8,
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    TCG_REG_R9,
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    TCG_REG_R10,
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#ifndef __APPLE__
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#ifndef _CALL_DARWIN
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    TCG_REG_R11,
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#endif
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    TCG_REG_R12,
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#ifndef __linux__
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#ifndef _CALL_SYSV
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    TCG_REG_R13,
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#endif
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    TCG_REG_R24,
......
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};
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147 147
static const int tcg_target_callee_save_regs[] = {
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#ifdef __APPLE__
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#ifdef _CALL_DARWIN
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    TCG_REG_R11,
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    TCG_REG_R13,
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#endif
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#ifdef _AIX
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#ifdef _CALL_AIX
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    TCG_REG_R13,
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#endif
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    TCG_REG_R14,
......
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static void tcg_out_call (TCGContext *s, tcg_target_long arg, int const_arg)
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{
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#ifdef _AIX
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#ifdef _CALL_AIX
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    int reg;
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    if (const_arg) {
......
908 908
        ;
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    frame_size = (frame_size + 15) & ~15;
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#ifdef _AIX
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#ifdef _CALL_AIX
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    {
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        uint32_t addr;
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......
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    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
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    tcg_regset_set32(tcg_target_call_clobber_regs, 0,
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                     (1 << TCG_REG_R0) |
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#ifdef __APPLE__
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#ifdef _CALL_DARWIN
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                     (1 << TCG_REG_R2) |
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#endif
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                     (1 << TCG_REG_R3) |
......
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    tcg_regset_clear(s->reserved_regs);
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0);
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R1);
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#ifndef __APPLE__
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#ifndef _CALL_DARWIN
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R2);
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#endif
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#ifdef __linux__
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#ifdef _CALL_SYSV
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    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13);
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#endif
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#ifdef CONFIG_USE_GUEST_BASE

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