Revision 6f27aba6 target-sparc/cpu.h
| b/target-sparc/cpu.h | ||
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#define PS_AG (1<<0) |
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#define FPRS_FEF (1<<2) |
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#define HS_PRIV (1<<2) |
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#endif |
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/* Fcc */ |
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typedef struct sparc_def_t sparc_def_t; |
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#if !defined(TARGET_SPARC64) |
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#define NB_MMU_MODES 2 |
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#else |
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#define NB_MMU_MODES 3 |
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#endif |
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typedef struct CPUSPARCState {
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target_ulong gregs[8]; /* general registers */ |
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#define cpu_list sparc_cpu_list |
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/* MMU modes definitions */ |
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#define MMU_MODE0_SUFFIX _kernel |
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#define MMU_MODE1_SUFFIX _user |
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#define MMU_USER_IDX 1 |
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#define MMU_MODE0_SUFFIX _user |
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#define MMU_MODE1_SUFFIX _kernel |
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#ifdef TARGET_SPARC64 |
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#define MMU_MODE2_SUFFIX _hypv |
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#endif |
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#define MMU_USER_IDX 0 |
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static inline int cpu_mmu_index (CPUState *env) |
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{
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return env->psrs == 0 ? 1 : 0; |
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#if defined(CONFIG_USER_ONLY) |
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return 0; |
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#elif !defined(TARGET_SPARC64) |
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return env->psrs; |
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#else |
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if (!env->psrs) |
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return 0; |
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else if ((env->hpstate & HS_PRIV) == 0) |
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return 1; |
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else |
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return 2; |
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#endif |
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} |
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static inline int cpu_fpu_enabled(CPUState *env) |
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{
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#if defined(CONFIG_USER_ONLY) |
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return 1; |
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#elif !defined(TARGET_SPARC64) |
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return env->psref; |
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#else |
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return ((env->pstate & PS_PEF) != 0) && ((env->fprs & FPRS_FEF) != 0); |
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#endif |
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} |
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#include "cpu-all.h" |
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