Revision 6f382b5e
b/hw/usb-uhci.c | ||
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310 | 310 |
int i; |
311 | 311 |
UHCIPort *port; |
312 | 312 |
|
313 |
dprintf("uhci: full reset\n"); |
|
314 |
|
|
313 | 315 |
pci_conf = s->dev.config; |
314 | 316 |
|
315 | 317 |
pci_conf[0x6a] = 0x01; /* usb clock */ |
... | ... | |
331 | 333 |
uhci_async_cancel_all(s); |
332 | 334 |
} |
333 | 335 |
|
334 |
#if 1 |
|
335 | 336 |
static void uhci_save(QEMUFile *f, void *opaque) |
336 | 337 |
{ |
337 | 338 |
UHCIState *s = opaque; |
338 | 339 |
uint8_t num_ports = NB_PORTS; |
339 | 340 |
int i; |
340 | 341 |
|
342 |
uhci_async_cancel_all(s); |
|
343 |
|
|
341 | 344 |
pci_device_save(&s->dev, f); |
342 | 345 |
|
343 | 346 |
qemu_put_8s(f, &num_ports); |
... | ... | |
383 | 386 |
|
384 | 387 |
return 0; |
385 | 388 |
} |
386 |
#endif |
|
387 | 389 |
|
388 | 390 |
static void uhci_ioport_writeb(void *opaque, uint32_t addr, uint32_t val) |
389 | 391 |
{ |
... | ... | |
1009 | 1011 |
qemu_del_timer(s->frame_timer); |
1010 | 1012 |
/* set hchalted bit in status - UHCI11D 2.1.2 */ |
1011 | 1013 |
s->status |= UHCI_STS_HCHALTED; |
1014 |
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1015 |
dprintf("uhci: halted\n"); |
|
1012 | 1016 |
return; |
1013 | 1017 |
} |
1014 | 1018 |
|
... | ... | |
1082 | 1086 |
to rely on this. */ |
1083 | 1087 |
pci_register_io_region(&s->dev, 4, 0x20, |
1084 | 1088 |
PCI_ADDRESS_SPACE_IO, uhci_map); |
1089 |
|
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1090 |
register_savevm("uhci", 0, 1, uhci_save, uhci_load, s); |
|
1085 | 1091 |
} |
1086 | 1092 |
|
1087 | 1093 |
void usb_uhci_piix4_init(PCIBus *bus, int devfn) |
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