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root / target-mips @ 6fbab869

Name Size
TODO 1.9 kB
cpu.h 18.2 kB
exec.h 2.7 kB
helper.c 20.9 kB
helper.h 8.6 kB
machine.c 10.6 kB
mips-defs.h 2.1 kB
op_helper.c 96.2 kB
translate.c 350.2 kB
translate_init.c 22.5 kB

Latest revisions

# Date Author Comment
6fbab869 06/30/2010 09:00 pm Aurelien Jarno

target-mips: fix DINSU instruction

Signed-off-by: Aurelien Jarno <>

aa8f4009 06/30/2010 12:26 am Aurelien Jarno

target-mips: enable movn/movz on loongson 2E & 2F

Signed-off-by: Aurelien Jarno <>

5bc6fba8 06/30/2010 12:07 am Huacai Chen

MIPS: Initial support of fulong mini pc (CPU definition)

Signed-off-by: Huacai Chen <>
Signed-off-by: Aurelien Jarno <>

33087598 06/10/2010 12:37 am Stefan Weil

target-mips: Fix compilation

TCGv t1 needs tcg_temp_free instead of tcg_temp_free_i32.

Cc: Nathan Froyd <>
Cc: Aurelien Jarno <>
Signed-off-by: Stefan Weil <>
Signed-off-by: Aurelien Jarno <>

bbfa8f72 06/09/2010 05:10 pm Nathan Froyd

target-mips: add microMIPS exception handler support

Unlike MIPS16, microMIPS lets you choose the ISA mode for your exception
handlers. The ISA mode is selectable via a user-writable CP0.Config3
flag.

Signed-off-by: Nathan Froyd <>...

bf4120ad 06/09/2010 05:10 pm Nathan Froyd

target-mips: define constants for magic numbers

Add FMT_* constants for the floating-point format field in opcodes and
tweak a few places to use them. Add enums for various invocations of
FOP and tweak gen_farith and its lone caller accordingly.

Signed-off-by: Nathan Froyd <>...

e459440a 06/09/2010 05:10 pm Aurelien Jarno

target-mips: move FP FMT comments closer to the definitions

Signed-off-by: Aurelien Jarno <>

8153667c 06/09/2010 05:10 pm Nathan Froyd

target-mips: refactor c{, abs}.cond.fmt insns

Move all knowledge about coprocessor-checking and register numbering
into the gen_cmp* helper functions.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

620e48f6 06/09/2010 05:10 pm Nathan Froyd

target-mips: mips16 cleanups

Change code handling mips16-specific branches to use ISA-neutral special
opcodes. Since there are several places where the delay slot
requirements for microMIPS branches differ from mips16 branches, using
opcodes is easier than checking hflags, then checking mips16...

3c824109 06/09/2010 05:10 pm Nathan Froyd

target-mips: microMIPS ASE support

Add instruction decoding for the microMIPS ASE. All we do is decode and
then forward to the existing gen_* routines.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

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