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/*
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 * Arm PrimeCell PL061 General Purpose IO with additional
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 * Luminary Micro Stellaris bits.
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 *
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 * Copyright (c) 2007 CodeSourcery.
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 * Written by Paul Brook
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 *
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 * This code is licenced under the GPL.
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 */
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#include "sysbus.h"
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//#define DEBUG_PL061 1
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#ifdef DEBUG_PL061
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#define DPRINTF(fmt, ...) \
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do { printf("pl061: " fmt , ## __VA_ARGS__); } while (0)
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
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#else
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#define DPRINTF(fmt, ...) do {} while(0)
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__);} while (0)
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#endif
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static const uint8_t pl061_id[12] =
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  { 0x00, 0x00, 0x00, 0x00, 0x61, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
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static const uint8_t pl061_id_luminary[12] =
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  { 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 };
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typedef struct {
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    SysBusDevice busdev;
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    int locked;
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    uint8_t data;
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    uint8_t old_data;
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    uint8_t dir;
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    uint8_t isense;
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    uint8_t ibe;
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    uint8_t iev;
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    uint8_t im;
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    uint8_t istate;
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    uint8_t afsel;
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    uint8_t dr2r;
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    uint8_t dr4r;
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    uint8_t dr8r;
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    uint8_t odr;
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    uint8_t pur;
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    uint8_t pdr;
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    uint8_t slr;
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    uint8_t den;
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    uint8_t cr;
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    uint8_t float_high;
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    qemu_irq irq;
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    qemu_irq out[8];
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    const unsigned char *id;
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} pl061_state;
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static void pl061_update(pl061_state *s)
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{
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    uint8_t changed;
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    uint8_t mask;
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    uint8_t out;
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    int i;
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    /* Outputs float high.  */
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    /* FIXME: This is board dependent.  */
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    out = (s->data & s->dir) | ~s->dir;
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    changed = s->old_data ^ out;
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    if (!changed)
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        return;
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    s->old_data = out;
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    for (i = 0; i < 8; i++) {
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        mask = 1 << i;
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        if ((changed & mask) && s->out) {
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            DPRINTF("Set output %d = %d\n", i, (out & mask) != 0);
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            qemu_set_irq(s->out[i], (out & mask) != 0);
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        }
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    }
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    /* FIXME: Implement input interrupts.  */
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}
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static uint32_t pl061_read(void *opaque, target_phys_addr_t offset)
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{
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    pl061_state *s = (pl061_state *)opaque;
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    if (offset >= 0xfd0 && offset < 0x1000) {
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        return s->id[(offset - 0xfd0) >> 2];
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    }
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    if (offset < 0x400) {
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        return s->data & (offset >> 2);
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    }
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    switch (offset) {
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    case 0x400: /* Direction */
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        return s->dir;
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    case 0x404: /* Interrupt sense */
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        return s->isense;
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    case 0x408: /* Interrupt both edges */
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        return s->ibe;
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    case 0x40c: /* Interupt event */
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        return s->iev;
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    case 0x410: /* Interrupt mask */
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        return s->im;
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    case 0x414: /* Raw interrupt status */
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        return s->istate;
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    case 0x418: /* Masked interrupt status */
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        return s->istate | s->im;
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    case 0x420: /* Alternate function select */
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        return s->afsel;
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    case 0x500: /* 2mA drive */
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        return s->dr2r;
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    case 0x504: /* 4mA drive */
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        return s->dr4r;
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    case 0x508: /* 8mA drive */
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        return s->dr8r;
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    case 0x50c: /* Open drain */
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        return s->odr;
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    case 0x510: /* Pull-up */
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        return s->pur;
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    case 0x514: /* Pull-down */
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        return s->pdr;
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    case 0x518: /* Slew rate control */
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        return s->slr;
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    case 0x51c: /* Digital enable */
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        return s->den;
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    case 0x520: /* Lock */
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        return s->locked;
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    case 0x524: /* Commit */
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        return s->cr;
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    default:
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        hw_error("pl061_read: Bad offset %x\n", (int)offset);
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        return 0;
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    }
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}
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static void pl061_write(void *opaque, target_phys_addr_t offset,
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                        uint32_t value)
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{
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    pl061_state *s = (pl061_state *)opaque;
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    uint8_t mask;
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    if (offset < 0x400) {
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        mask = (offset >> 2) & s->dir;
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        s->data = (s->data & ~mask) | (value & mask);
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        pl061_update(s);
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        return;
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    }
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    switch (offset) {
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    case 0x400: /* Direction */
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        s->dir = value;
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        break;
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    case 0x404: /* Interrupt sense */
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        s->isense = value;
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        break;
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    case 0x408: /* Interrupt both edges */
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        s->ibe = value;
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        break;
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    case 0x40c: /* Interupt event */
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        s->iev = value;
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        break;
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    case 0x410: /* Interrupt mask */
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        s->im = value;
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        break;
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    case 0x41c: /* Interrupt clear */
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        s->istate &= ~value;
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        break;
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    case 0x420: /* Alternate function select */
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        mask = s->cr;
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        s->afsel = (s->afsel & ~mask) | (value & mask);
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        break;
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    case 0x500: /* 2mA drive */
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        s->dr2r = value;
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        break;
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    case 0x504: /* 4mA drive */
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        s->dr4r = value;
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        break;
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    case 0x508: /* 8mA drive */
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        s->dr8r = value;
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        break;
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    case 0x50c: /* Open drain */
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        s->odr = value;
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        break;
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    case 0x510: /* Pull-up */
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        s->pur = value;
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        break;
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    case 0x514: /* Pull-down */
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        s->pdr = value;
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        break;
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    case 0x518: /* Slew rate control */
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        s->slr = value;
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        break;
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    case 0x51c: /* Digital enable */
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        s->den = value;
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        break;
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    case 0x520: /* Lock */
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        s->locked = (value != 0xacce551);
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        break;
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    case 0x524: /* Commit */
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        if (!s->locked)
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            s->cr = value;
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        break;
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    default:
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        hw_error("pl061_write: Bad offset %x\n", (int)offset);
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    }
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    pl061_update(s);
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}
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static void pl061_reset(pl061_state *s)
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{
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  s->locked = 1;
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  s->cr = 0xff;
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}
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static void pl061_set_irq(void * opaque, int irq, int level)
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{
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    pl061_state *s = (pl061_state *)opaque;
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    uint8_t mask;
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    mask = 1 << irq;
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    if ((s->dir & mask) == 0) {
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        s->data &= ~mask;
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        if (level)
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            s->data |= mask;
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        pl061_update(s);
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    }
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}
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static CPUReadMemoryFunc * const pl061_readfn[] = {
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   pl061_read,
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   pl061_read,
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   pl061_read
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};
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static CPUWriteMemoryFunc * const pl061_writefn[] = {
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   pl061_write,
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   pl061_write,
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   pl061_write
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};
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static void pl061_save(QEMUFile *f, void *opaque)
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{
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    pl061_state *s = (pl061_state *)opaque;
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    qemu_put_be32(f, s->locked);
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    qemu_put_be32(f, s->data);
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    qemu_put_be32(f, s->old_data);
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    qemu_put_be32(f, s->dir);
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    qemu_put_be32(f, s->isense);
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    qemu_put_be32(f, s->ibe);
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    qemu_put_be32(f, s->iev);
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    qemu_put_be32(f, s->im);
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    qemu_put_be32(f, s->istate);
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    qemu_put_be32(f, s->afsel);
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    qemu_put_be32(f, s->dr2r);
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    qemu_put_be32(f, s->dr4r);
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    qemu_put_be32(f, s->dr8r);
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    qemu_put_be32(f, s->odr);
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    qemu_put_be32(f, s->pur);
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    qemu_put_be32(f, s->pdr);
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    qemu_put_be32(f, s->slr);
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    qemu_put_be32(f, s->den);
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    qemu_put_be32(f, s->cr);
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    qemu_put_be32(f, s->float_high);
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}
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static int pl061_load(QEMUFile *f, void *opaque, int version_id)
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{
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    pl061_state *s = (pl061_state *)opaque;
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    if (version_id != 1)
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        return -EINVAL;
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    s->locked = qemu_get_be32(f);
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    s->data = qemu_get_be32(f);
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    s->old_data = qemu_get_be32(f);
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    s->dir = qemu_get_be32(f);
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    s->isense = qemu_get_be32(f);
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    s->ibe = qemu_get_be32(f);
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    s->iev = qemu_get_be32(f);
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    s->im = qemu_get_be32(f);
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    s->istate = qemu_get_be32(f);
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    s->afsel = qemu_get_be32(f);
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    s->dr2r = qemu_get_be32(f);
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    s->dr4r = qemu_get_be32(f);
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    s->dr8r = qemu_get_be32(f);
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    s->odr = qemu_get_be32(f);
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    s->pur = qemu_get_be32(f);
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    s->pdr = qemu_get_be32(f);
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    s->slr = qemu_get_be32(f);
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    s->den = qemu_get_be32(f);
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    s->cr = qemu_get_be32(f);
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    s->float_high = qemu_get_be32(f);
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    return 0;
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}
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static int pl061_init(SysBusDevice *dev, const unsigned char *id)
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{
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    int iomemtype;
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    pl061_state *s = FROM_SYSBUS(pl061_state, dev);
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    s->id = id;
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    iomemtype = cpu_register_io_memory(pl061_readfn,
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                                       pl061_writefn, s,
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                                       DEVICE_NATIVE_ENDIAN);
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    sysbus_init_mmio(dev, 0x1000, iomemtype);
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    sysbus_init_irq(dev, &s->irq);
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    qdev_init_gpio_in(&dev->qdev, pl061_set_irq, 8);
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    qdev_init_gpio_out(&dev->qdev, s->out, 8);
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    pl061_reset(s);
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    register_savevm(&dev->qdev, "pl061_gpio", -1, 1, pl061_save, pl061_load, s);
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    return 0;
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}
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static int pl061_init_luminary(SysBusDevice *dev)
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{
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    return pl061_init(dev, pl061_id_luminary);
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}
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static int pl061_init_arm(SysBusDevice *dev)
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{
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    return pl061_init(dev, pl061_id);
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}
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static void pl061_register_devices(void)
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{
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    sysbus_register_dev("pl061", sizeof(pl061_state),
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                        pl061_init_arm);
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    sysbus_register_dev("pl061_luminary", sizeof(pl061_state),
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                        pl061_init_luminary);
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}
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device_init(pl061_register_devices)