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root / target-ppc @ 72249e34

Name Size
STATUS 10.6 kB
cpu.h 58.9 kB
exec.h 1.5 kB
helper.c 92 kB
helper.h 13.8 kB
helper_regs.h 3.4 kB
kvm.c 4.8 kB
kvm_ppc.c 2.6 kB
kvm_ppc.h 434 Bytes
machine.c 5.8 kB
mfrom_table.c 3.3 kB
mfrom_table_gen.c 652 Bytes
op_helper.c 124.3 kB
translate.c 308.4 kB
translate_init.c 412.3 kB

Latest revisions

# Date Author Comment
2adab7d6 02/28/2009 08:39 pm blueswir1

Implement HIOR

A real 970 CPU starts up with HIOR=0xfff00000 and triggers a reset
exception, basically ending up at IP 0xfff001000.

Later on this HIOR has to be set to 0 by the firmware in order to
enable the OS to handle interrupts on its own.

This patch maps HIOR to exec_prefix, which does the same thing...
a457e7ee 02/28/2009 10:25 am blueswir1

Fix typo in gen_qemu_ld32s

When the CPU is in little endian mode, it should load values from RAM
in byte swapped manner. This check is in all the ld and st functions,
but misspelled in gen_qemu_ld32s.

This patch fixes the misspelling and makes ppc64 Linux happier....
07c485ce 02/21/2009 07:29 pm blueswir1

Turn MMU off on reset

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6637 c046a42c-6fe2-441c-8c8c-71466251a162
5518f3a6 02/19/2009 10:17 pm blueswir1

Fix branch debugging

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6629 c046a42c-6fe2-441c-8c8c-71466251a162
bd5ea513 02/09/2009 06:50 pm aurel32

target-ppc: Model e500v{1,2} CPUs more accurately

The e500v1 chips only have single-precision floating point; don't say we
support the double-precision floating-point instructions on such chips.
Also add an e500v1 -cpu argument for a generic e500v1.

Signed-off-by: Nathan Froyd <>...
40569b7e 02/09/2009 06:49 pm aurel32

target-ppc: Model SPE floating-point instructions more accurately

Single-precision and double-precision floating-point instructions should
be separated into their own categories, since some chips only support
single-precision instructions.

Signed-off-by: Nathan Froyd <>...
071fc3b1 02/09/2009 06:49 pm aurel32

target-ppc: Add vrsqrtefp instruction

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6574 c046a42c-6fe2-441c-8c8c-71466251a162
bdfbac35 02/09/2009 06:49 pm aurel32

target-ppc: Add vrefp instruction

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6573 c046a42c-6fe2-441c-8c8c-71466251a162
875b31db 02/09/2009 06:49 pm aurel32

target-ppc: Add vct{u,s}xs instructions

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6572 c046a42c-6fe2-441c-8c8c-71466251a162
819ca121 02/09/2009 06:49 pm aurel32

target-ppc: Add vcmp{eq, ge, gt, b}fp{, .} instructions

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6571 c046a42c-6fe2-441c-8c8c-71466251a162

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