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/*
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* Inter-VM Shared Memory PCI device.
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*
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* Author:
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* Cam Macdonell <cam@cs.ualberta.ca>
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*
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* Based On: cirrus_vga.c
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* Copyright (c) 2004 Fabrice Bellard
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* Copyright (c) 2004 Makoto Suzuki (suzu)
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*
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* and rtl8139.c
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* Copyright (c) 2006 Igor Kovalenko
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*
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* This code is licensed under the GNU GPL v2.
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*/
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#include "hw.h" |
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#include "pc.h" |
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#include "pci.h" |
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#include "msix.h" |
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#include "kvm.h" |
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#include <sys/mman.h> |
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#include <sys/types.h> |
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#define IVSHMEM_IOEVENTFD 0 |
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#define IVSHMEM_MSI 1 |
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#define IVSHMEM_PEER 0 |
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#define IVSHMEM_MASTER 1 |
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#define IVSHMEM_REG_BAR_SIZE 0x100 |
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//#define DEBUG_IVSHMEM
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#ifdef DEBUG_IVSHMEM
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#define IVSHMEM_DPRINTF(fmt, ...) \
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do {printf("IVSHMEM: " fmt, ## __VA_ARGS__); } while (0) |
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#else
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#define IVSHMEM_DPRINTF(fmt, ...)
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#endif
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typedef struct Peer { |
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int nb_eventfds;
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int *eventfds;
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} Peer; |
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typedef struct EventfdEntry { |
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PCIDevice *pdev; |
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int vector;
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} EventfdEntry; |
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typedef struct IVShmemState { |
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PCIDevice dev; |
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uint32_t intrmask; |
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uint32_t intrstatus; |
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uint32_t doorbell; |
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|
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CharDriverState **eventfd_chr; |
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CharDriverState *server_chr; |
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MemoryRegion ivshmem_mmio; |
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pcibus_t mmio_addr; |
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/* We might need to register the BAR before we actually have the memory.
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* So prepare a container MemoryRegion for the BAR immediately and
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* add a subregion when we have the memory.
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*/
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MemoryRegion bar; |
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MemoryRegion ivshmem; |
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MemoryRegion msix_bar; |
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uint64_t ivshmem_size; /* size of shared memory region */
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int shm_fd; /* shared memory file descriptor */ |
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Peer *peers; |
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int nb_peers; /* how many guests we have space for */ |
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int max_peer; /* maximum numbered peer */ |
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int vm_id;
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uint32_t vectors; |
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uint32_t features; |
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EventfdEntry *eventfd_table; |
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char * shmobj;
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char * sizearg;
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char * role;
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int role_val; /* scalar to avoid multiple string comparisons */ |
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} IVShmemState; |
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/* registers for the Inter-VM shared memory device */
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enum ivshmem_registers {
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INTRMASK = 0,
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INTRSTATUS = 4,
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IVPOSITION = 8,
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DOORBELL = 12,
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}; |
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static inline uint32_t ivshmem_has_feature(IVShmemState *ivs, |
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unsigned int feature) { |
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return (ivs->features & (1 << feature)); |
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} |
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static inline bool is_power_of_two(uint64_t x) { |
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return (x & (x - 1)) == 0; |
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} |
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/* accessing registers - based on rtl8139 */
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static void ivshmem_update_irq(IVShmemState *s, int val) |
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{ |
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int isr;
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isr = (s->intrstatus & s->intrmask) & 0xffffffff;
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/* don't print ISR resets */
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if (isr) {
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IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
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isr ? 1 : 0, s->intrstatus, s->intrmask); |
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} |
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qemu_set_irq(s->dev.irq[0], (isr != 0)); |
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} |
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static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val) |
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{ |
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IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
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s->intrmask = val; |
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ivshmem_update_irq(s, val); |
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} |
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static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
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{ |
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uint32_t ret = s->intrmask; |
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IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
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return ret;
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} |
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static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val) |
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{ |
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IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
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s->intrstatus = val; |
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ivshmem_update_irq(s, val); |
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return;
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} |
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static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
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{ |
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uint32_t ret = s->intrstatus; |
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/* reading ISR clears all interrupts */
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s->intrstatus = 0;
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ivshmem_update_irq(s, 0);
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return ret;
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} |
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static void ivshmem_io_write(void *opaque, target_phys_addr_t addr, |
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uint64_t val, unsigned size)
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{ |
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IVShmemState *s = opaque; |
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uint64_t write_one = 1;
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uint16_t dest = val >> 16;
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uint16_t vector = val & 0xff;
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addr &= 0xfc;
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IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr); |
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switch (addr)
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{ |
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case INTRMASK:
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ivshmem_IntrMask_write(s, val); |
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break;
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case INTRSTATUS:
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ivshmem_IntrStatus_write(s, val); |
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break;
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case DOORBELL:
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/* check that dest VM ID is reasonable */
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if (dest > s->max_peer) {
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IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
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break;
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} |
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/* check doorbell range */
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if (vector < s->peers[dest].nb_eventfds) {
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IVSHMEM_DPRINTF("Writing %" PRId64 " to VM %d on vector %d\n", |
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write_one, dest, vector); |
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if (write(s->peers[dest].eventfds[vector],
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&(write_one), 8) != 8) { |
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IVSHMEM_DPRINTF("error writing to eventfd\n");
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} |
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} |
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break;
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default:
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IVSHMEM_DPRINTF("Invalid VM Doorbell VM %d\n", dest);
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} |
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} |
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static uint64_t ivshmem_io_read(void *opaque, target_phys_addr_t addr, |
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unsigned size)
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{ |
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IVShmemState *s = opaque; |
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uint32_t ret; |
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switch (addr)
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{ |
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case INTRMASK:
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ret = ivshmem_IntrMask_read(s); |
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break;
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case INTRSTATUS:
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ret = ivshmem_IntrStatus_read(s); |
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break;
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case IVPOSITION:
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/* return my VM ID if the memory is mapped */
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if (s->shm_fd > 0) { |
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ret = s->vm_id; |
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} else {
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ret = -1;
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} |
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break;
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default:
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IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr); |
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ret = 0;
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} |
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return ret;
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} |
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static const MemoryRegionOps ivshmem_mmio_ops = { |
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.read = ivshmem_io_read, |
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.write = ivshmem_io_write, |
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.endianness = DEVICE_NATIVE_ENDIAN, |
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.impl = { |
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.min_access_size = 4,
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.max_access_size = 4,
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}, |
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}; |
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static void ivshmem_receive(void *opaque, const uint8_t *buf, int size) |
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{ |
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IVShmemState *s = opaque; |
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ivshmem_IntrStatus_write(s, *buf); |
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IVSHMEM_DPRINTF("ivshmem_receive 0x%02x\n", *buf);
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} |
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static int ivshmem_can_receive(void * opaque) |
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{ |
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return 8; |
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} |
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static void ivshmem_event(void *opaque, int event) |
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{ |
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IVSHMEM_DPRINTF("ivshmem_event %d\n", event);
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} |
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static void fake_irqfd(void *opaque, const uint8_t *buf, int size) { |
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EventfdEntry *entry = opaque; |
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PCIDevice *pdev = entry->pdev; |
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IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, entry->vector);
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msix_notify(pdev, entry->vector); |
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} |
274 |
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static CharDriverState* create_eventfd_chr_device(void * opaque, int eventfd, |
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int vector)
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{ |
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/* create a event character device based on the passed eventfd */
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IVShmemState *s = opaque; |
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CharDriverState * chr; |
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chr = qemu_chr_open_eventfd(eventfd); |
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if (chr == NULL) { |
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fprintf(stderr, "creating eventfd for eventfd %d failed\n", eventfd);
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exit(-1);
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} |
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/* if MSI is supported we need multiple interrupts */
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if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
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s->eventfd_table[vector].pdev = &s->dev; |
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s->eventfd_table[vector].vector = vector; |
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qemu_chr_add_handlers(chr, ivshmem_can_receive, fake_irqfd, |
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ivshmem_event, &s->eventfd_table[vector]); |
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} else {
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qemu_chr_add_handlers(chr, ivshmem_can_receive, ivshmem_receive, |
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ivshmem_event, s); |
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} |
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return chr;
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} |
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static int check_shm_size(IVShmemState *s, int fd) { |
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/* check that the guest isn't going to try and map more memory than the
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* the object has allocated return -1 to indicate error */
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struct stat buf;
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fstat(fd, &buf); |
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if (s->ivshmem_size > buf.st_size) {
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fprintf(stderr, |
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"IVSHMEM ERROR: Requested memory size greater"
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" than shared object size (%" PRIu64 " > %" PRIu64")\n", |
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s->ivshmem_size, (uint64_t)buf.st_size); |
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return -1; |
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} else {
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return 0; |
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} |
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} |
323 |
|
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/* create the shared memory BAR when we are not using the server, so we can
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* create the BAR and map the memory immediately */
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static void create_shared_memory_BAR(IVShmemState *s, int fd) { |
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void * ptr;
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s->shm_fd = fd; |
331 |
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ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0); |
333 |
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memory_region_init_ram_ptr(&s->ivshmem, &s->dev.qdev, "ivshmem.bar2",
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s->ivshmem_size, ptr); |
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memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
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|
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/* region for shared memory */
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pci_register_bar(&s->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
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} |
341 |
|
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static void close_guest_eventfds(IVShmemState *s, int posn) |
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{ |
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int i, guest_curr_max;
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guest_curr_max = s->peers[posn].nb_eventfds; |
347 |
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for (i = 0; i < guest_curr_max; i++) { |
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kvm_set_ioeventfd_mmio_long(s->peers[posn].eventfds[i], |
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s->mmio_addr + DOORBELL, (posn << 16) | i, 0); |
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close(s->peers[posn].eventfds[i]); |
352 |
} |
353 |
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g_free(s->peers[posn].eventfds); |
355 |
s->peers[posn].nb_eventfds = 0;
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} |
357 |
|
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static void setup_ioeventfds(IVShmemState *s) { |
359 |
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int i, j;
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|
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for (i = 0; i <= s->max_peer; i++) { |
363 |
for (j = 0; j < s->peers[i].nb_eventfds; j++) { |
364 |
memory_region_add_eventfd(&s->ivshmem_mmio, |
365 |
DOORBELL, |
366 |
4,
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true,
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(i << 16) | j,
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s->peers[i].eventfds[j]); |
370 |
} |
371 |
} |
372 |
} |
373 |
|
374 |
/* this function increase the dynamic storage need to store data about other
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* guests */
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static void increase_dynamic_storage(IVShmemState *s, int new_min_size) { |
377 |
|
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int j, old_nb_alloc;
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379 |
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old_nb_alloc = s->nb_peers; |
381 |
|
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while (new_min_size >= s->nb_peers)
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s->nb_peers = s->nb_peers * 2;
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384 |
|
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IVSHMEM_DPRINTF("bumping storage to %d guests\n", s->nb_peers);
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386 |
s->peers = g_realloc(s->peers, s->nb_peers * sizeof(Peer));
|
387 |
|
388 |
/* zero out new pointers */
|
389 |
for (j = old_nb_alloc; j < s->nb_peers; j++) {
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390 |
s->peers[j].eventfds = NULL;
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s->peers[j].nb_eventfds = 0;
|
392 |
} |
393 |
} |
394 |
|
395 |
static void ivshmem_read(void *opaque, const uint8_t * buf, int flags) |
396 |
{ |
397 |
IVShmemState *s = opaque; |
398 |
int incoming_fd, tmp_fd;
|
399 |
int guest_max_eventfd;
|
400 |
long incoming_posn;
|
401 |
|
402 |
memcpy(&incoming_posn, buf, sizeof(long)); |
403 |
/* pick off s->server_chr->msgfd and store it, posn should accompany msg */
|
404 |
tmp_fd = qemu_chr_get_msgfd(s->server_chr); |
405 |
IVSHMEM_DPRINTF("posn is %ld, fd is %d\n", incoming_posn, tmp_fd);
|
406 |
|
407 |
/* make sure we have enough space for this guest */
|
408 |
if (incoming_posn >= s->nb_peers) {
|
409 |
increase_dynamic_storage(s, incoming_posn); |
410 |
} |
411 |
|
412 |
if (tmp_fd == -1) { |
413 |
/* if posn is positive and unseen before then this is our posn*/
|
414 |
if ((incoming_posn >= 0) && |
415 |
(s->peers[incoming_posn].eventfds == NULL)) {
|
416 |
/* receive our posn */
|
417 |
s->vm_id = incoming_posn; |
418 |
return;
|
419 |
} else {
|
420 |
/* otherwise an fd == -1 means an existing guest has gone away */
|
421 |
IVSHMEM_DPRINTF("posn %ld has gone away\n", incoming_posn);
|
422 |
close_guest_eventfds(s, incoming_posn); |
423 |
return;
|
424 |
} |
425 |
} |
426 |
|
427 |
/* because of the implementation of get_msgfd, we need a dup */
|
428 |
incoming_fd = dup(tmp_fd); |
429 |
|
430 |
if (incoming_fd == -1) { |
431 |
fprintf(stderr, "could not allocate file descriptor %s\n",
|
432 |
strerror(errno)); |
433 |
return;
|
434 |
} |
435 |
|
436 |
/* if the position is -1, then it's shared memory region fd */
|
437 |
if (incoming_posn == -1) { |
438 |
|
439 |
void * map_ptr;
|
440 |
|
441 |
s->max_peer = 0;
|
442 |
|
443 |
if (check_shm_size(s, incoming_fd) == -1) { |
444 |
exit(-1);
|
445 |
} |
446 |
|
447 |
/* mmap the region and map into the BAR2 */
|
448 |
map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
|
449 |
incoming_fd, 0);
|
450 |
memory_region_init_ram_ptr(&s->ivshmem, &s->dev.qdev, |
451 |
"ivshmem.bar2", s->ivshmem_size, map_ptr);
|
452 |
|
453 |
IVSHMEM_DPRINTF("guest h/w addr = %" PRIu64 ", size = %" PRIu64 "\n", |
454 |
s->ivshmem_offset, s->ivshmem_size); |
455 |
|
456 |
memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
|
457 |
|
458 |
/* only store the fd if it is successfully mapped */
|
459 |
s->shm_fd = incoming_fd; |
460 |
|
461 |
return;
|
462 |
} |
463 |
|
464 |
/* each guest has an array of eventfds, and we keep track of how many
|
465 |
* guests for each VM */
|
466 |
guest_max_eventfd = s->peers[incoming_posn].nb_eventfds; |
467 |
|
468 |
if (guest_max_eventfd == 0) { |
469 |
/* one eventfd per MSI vector */
|
470 |
s->peers[incoming_posn].eventfds = (int *) g_malloc(s->vectors *
|
471 |
sizeof(int)); |
472 |
} |
473 |
|
474 |
/* this is an eventfd for a particular guest VM */
|
475 |
IVSHMEM_DPRINTF("eventfds[%ld][%d] = %d\n", incoming_posn,
|
476 |
guest_max_eventfd, incoming_fd); |
477 |
s->peers[incoming_posn].eventfds[guest_max_eventfd] = incoming_fd; |
478 |
|
479 |
/* increment count for particular guest */
|
480 |
s->peers[incoming_posn].nb_eventfds++; |
481 |
|
482 |
/* keep track of the maximum VM ID */
|
483 |
if (incoming_posn > s->max_peer) {
|
484 |
s->max_peer = incoming_posn; |
485 |
} |
486 |
|
487 |
if (incoming_posn == s->vm_id) {
|
488 |
s->eventfd_chr[guest_max_eventfd] = create_eventfd_chr_device(s, |
489 |
s->peers[s->vm_id].eventfds[guest_max_eventfd], |
490 |
guest_max_eventfd); |
491 |
} |
492 |
|
493 |
if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
|
494 |
if (kvm_set_ioeventfd_mmio_long(incoming_fd, s->mmio_addr + DOORBELL,
|
495 |
(incoming_posn << 16) | guest_max_eventfd, 1) < 0) { |
496 |
fprintf(stderr, "ivshmem: ioeventfd not available\n");
|
497 |
} |
498 |
} |
499 |
|
500 |
return;
|
501 |
} |
502 |
|
503 |
static void ivshmem_reset(DeviceState *d) |
504 |
{ |
505 |
IVShmemState *s = DO_UPCAST(IVShmemState, dev.qdev, d); |
506 |
|
507 |
s->intrstatus = 0;
|
508 |
return;
|
509 |
} |
510 |
|
511 |
static uint64_t ivshmem_get_size(IVShmemState * s) {
|
512 |
|
513 |
uint64_t value; |
514 |
char *ptr;
|
515 |
|
516 |
value = strtoull(s->sizearg, &ptr, 10);
|
517 |
switch (*ptr) {
|
518 |
case 0: case 'M': case 'm': |
519 |
value <<= 20;
|
520 |
break;
|
521 |
case 'G': case 'g': |
522 |
value <<= 30;
|
523 |
break;
|
524 |
default:
|
525 |
fprintf(stderr, "qemu: invalid ram size: %s\n", s->sizearg);
|
526 |
exit(1);
|
527 |
} |
528 |
|
529 |
/* BARs must be a power of 2 */
|
530 |
if (!is_power_of_two(value)) {
|
531 |
fprintf(stderr, "ivshmem: size must be power of 2\n");
|
532 |
exit(1);
|
533 |
} |
534 |
|
535 |
return value;
|
536 |
} |
537 |
|
538 |
static void ivshmem_setup_msi(IVShmemState * s) { |
539 |
|
540 |
int i;
|
541 |
|
542 |
/* allocate the MSI-X vectors */
|
543 |
|
544 |
memory_region_init(&s->msix_bar, "ivshmem-msix", 4096); |
545 |
if (!msix_init(&s->dev, s->vectors, &s->msix_bar, 1, 0)) { |
546 |
pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY,
|
547 |
&s->msix_bar); |
548 |
IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
|
549 |
} else {
|
550 |
IVSHMEM_DPRINTF("msix initialization failed\n");
|
551 |
exit(1);
|
552 |
} |
553 |
|
554 |
/* 'activate' the vectors */
|
555 |
for (i = 0; i < s->vectors; i++) { |
556 |
msix_vector_use(&s->dev, i); |
557 |
} |
558 |
|
559 |
/* allocate Qemu char devices for receiving interrupts */
|
560 |
s->eventfd_table = g_malloc0(s->vectors * sizeof(EventfdEntry));
|
561 |
} |
562 |
|
563 |
static void ivshmem_save(QEMUFile* f, void *opaque) |
564 |
{ |
565 |
IVShmemState *proxy = opaque; |
566 |
|
567 |
IVSHMEM_DPRINTF("ivshmem_save\n");
|
568 |
pci_device_save(&proxy->dev, f); |
569 |
|
570 |
if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
|
571 |
msix_save(&proxy->dev, f); |
572 |
} else {
|
573 |
qemu_put_be32(f, proxy->intrstatus); |
574 |
qemu_put_be32(f, proxy->intrmask); |
575 |
} |
576 |
|
577 |
} |
578 |
|
579 |
static int ivshmem_load(QEMUFile* f, void *opaque, int version_id) |
580 |
{ |
581 |
IVSHMEM_DPRINTF("ivshmem_load\n");
|
582 |
|
583 |
IVShmemState *proxy = opaque; |
584 |
int ret, i;
|
585 |
|
586 |
if (version_id > 0) { |
587 |
return -EINVAL;
|
588 |
} |
589 |
|
590 |
if (proxy->role_val == IVSHMEM_PEER) {
|
591 |
fprintf(stderr, "ivshmem: 'peer' devices are not migratable\n");
|
592 |
return -EINVAL;
|
593 |
} |
594 |
|
595 |
ret = pci_device_load(&proxy->dev, f); |
596 |
if (ret) {
|
597 |
return ret;
|
598 |
} |
599 |
|
600 |
if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
|
601 |
msix_load(&proxy->dev, f); |
602 |
for (i = 0; i < proxy->vectors; i++) { |
603 |
msix_vector_use(&proxy->dev, i); |
604 |
} |
605 |
} else {
|
606 |
proxy->intrstatus = qemu_get_be32(f); |
607 |
proxy->intrmask = qemu_get_be32(f); |
608 |
} |
609 |
|
610 |
return 0; |
611 |
} |
612 |
|
613 |
static int pci_ivshmem_init(PCIDevice *dev) |
614 |
{ |
615 |
IVShmemState *s = DO_UPCAST(IVShmemState, dev, dev); |
616 |
uint8_t *pci_conf; |
617 |
|
618 |
if (s->sizearg == NULL) |
619 |
s->ivshmem_size = 4 << 20; /* 4 MB default */ |
620 |
else {
|
621 |
s->ivshmem_size = ivshmem_get_size(s); |
622 |
} |
623 |
|
624 |
register_savevm(&s->dev.qdev, "ivshmem", 0, 0, ivshmem_save, ivshmem_load, |
625 |
dev); |
626 |
|
627 |
/* IRQFD requires MSI */
|
628 |
if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
|
629 |
!ivshmem_has_feature(s, IVSHMEM_MSI)) { |
630 |
fprintf(stderr, "ivshmem: ioeventfd/irqfd requires MSI\n");
|
631 |
exit(1);
|
632 |
} |
633 |
|
634 |
/* check that role is reasonable */
|
635 |
if (s->role) {
|
636 |
if (strncmp(s->role, "peer", 5) == 0) { |
637 |
s->role_val = IVSHMEM_PEER; |
638 |
} else if (strncmp(s->role, "master", 7) == 0) { |
639 |
s->role_val = IVSHMEM_MASTER; |
640 |
} else {
|
641 |
fprintf(stderr, "ivshmem: 'role' must be 'peer' or 'master'\n");
|
642 |
exit(1);
|
643 |
} |
644 |
} else {
|
645 |
s->role_val = IVSHMEM_MASTER; /* default */
|
646 |
} |
647 |
|
648 |
if (s->role_val == IVSHMEM_PEER) {
|
649 |
register_device_unmigratable(&s->dev.qdev, "ivshmem", s);
|
650 |
} |
651 |
|
652 |
pci_conf = s->dev.config; |
653 |
pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY; |
654 |
|
655 |
pci_config_set_interrupt_pin(pci_conf, 1);
|
656 |
|
657 |
s->shm_fd = 0;
|
658 |
|
659 |
memory_region_init_io(&s->ivshmem_mmio, &ivshmem_mmio_ops, s, |
660 |
"ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
|
661 |
|
662 |
if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
|
663 |
setup_ioeventfds(s); |
664 |
} |
665 |
|
666 |
/* region for registers*/
|
667 |
pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
|
668 |
&s->ivshmem_mmio); |
669 |
|
670 |
memory_region_init(&s->bar, "ivshmem-bar2-container", s->ivshmem_size);
|
671 |
|
672 |
if ((s->server_chr != NULL) && |
673 |
(strncmp(s->server_chr->filename, "unix:", 5) == 0)) { |
674 |
/* if we get a UNIX socket as the parameter we will talk
|
675 |
* to the ivshmem server to receive the memory region */
|
676 |
|
677 |
if (s->shmobj != NULL) { |
678 |
fprintf(stderr, "WARNING: do not specify both 'chardev' "
|
679 |
"and 'shm' with ivshmem\n");
|
680 |
} |
681 |
|
682 |
IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
|
683 |
s->server_chr->filename); |
684 |
|
685 |
if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
|
686 |
ivshmem_setup_msi(s); |
687 |
} |
688 |
|
689 |
/* we allocate enough space for 16 guests and grow as needed */
|
690 |
s->nb_peers = 16;
|
691 |
s->vm_id = -1;
|
692 |
|
693 |
/* allocate/initialize space for interrupt handling */
|
694 |
s->peers = g_malloc0(s->nb_peers * sizeof(Peer));
|
695 |
|
696 |
pci_register_bar(&s->dev, 2,
|
697 |
PCI_BASE_ADDRESS_SPACE_MEMORY, &s->ivshmem); |
698 |
|
699 |
s->eventfd_chr = g_malloc0(s->vectors * sizeof(CharDriverState *));
|
700 |
|
701 |
qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive, ivshmem_read, |
702 |
ivshmem_event, s); |
703 |
} else {
|
704 |
/* just map the file immediately, we're not using a server */
|
705 |
int fd;
|
706 |
|
707 |
if (s->shmobj == NULL) { |
708 |
fprintf(stderr, "Must specify 'chardev' or 'shm' to ivshmem\n");
|
709 |
} |
710 |
|
711 |
IVSHMEM_DPRINTF("using shm_open (shm object = %s)\n", s->shmobj);
|
712 |
|
713 |
/* try opening with O_EXCL and if it succeeds zero the memory
|
714 |
* by truncating to 0 */
|
715 |
if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR|O_EXCL,
|
716 |
S_IRWXU|S_IRWXG|S_IRWXO)) > 0) {
|
717 |
/* truncate file to length PCI device's memory */
|
718 |
if (ftruncate(fd, s->ivshmem_size) != 0) { |
719 |
fprintf(stderr, "ivshmem: could not truncate shared file\n");
|
720 |
} |
721 |
|
722 |
} else if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR, |
723 |
S_IRWXU|S_IRWXG|S_IRWXO)) < 0) {
|
724 |
fprintf(stderr, "ivshmem: could not open shared file\n");
|
725 |
exit(-1);
|
726 |
|
727 |
} |
728 |
|
729 |
if (check_shm_size(s, fd) == -1) { |
730 |
exit(-1);
|
731 |
} |
732 |
|
733 |
create_shared_memory_BAR(s, fd); |
734 |
|
735 |
} |
736 |
|
737 |
return 0; |
738 |
} |
739 |
|
740 |
static int pci_ivshmem_uninit(PCIDevice *dev) |
741 |
{ |
742 |
IVShmemState *s = DO_UPCAST(IVShmemState, dev, dev); |
743 |
|
744 |
memory_region_destroy(&s->ivshmem_mmio); |
745 |
memory_region_del_subregion(&s->bar, &s->ivshmem); |
746 |
memory_region_destroy(&s->ivshmem); |
747 |
memory_region_destroy(&s->bar); |
748 |
unregister_savevm(&dev->qdev, "ivshmem", s);
|
749 |
|
750 |
return 0; |
751 |
} |
752 |
|
753 |
static PCIDeviceInfo ivshmem_info = {
|
754 |
.qdev.name = "ivshmem",
|
755 |
.qdev.size = sizeof(IVShmemState),
|
756 |
.qdev.reset = ivshmem_reset, |
757 |
.init = pci_ivshmem_init, |
758 |
.exit = pci_ivshmem_uninit, |
759 |
.vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET, |
760 |
.device_id = 0x1110,
|
761 |
.class_id = PCI_CLASS_MEMORY_RAM, |
762 |
.qdev.props = (Property[]) { |
763 |
DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
|
764 |
DEFINE_PROP_STRING("size", IVShmemState, sizearg),
|
765 |
DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1), |
766 |
DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, false), |
767 |
DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true), |
768 |
DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
|
769 |
DEFINE_PROP_STRING("role", IVShmemState, role),
|
770 |
DEFINE_PROP_END_OF_LIST(), |
771 |
} |
772 |
}; |
773 |
|
774 |
static void ivshmem_register_devices(void) |
775 |
{ |
776 |
pci_qdev_register(&ivshmem_info); |
777 |
} |
778 |
|
779 |
device_init(ivshmem_register_devices) |