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/*
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* Physical memory management
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*
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* Copyright 2011 Red Hat, Inc. and/or its affiliates
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*
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* Authors:
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* Avi Kivity <avi@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*
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*/
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#include "memory.h" |
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#include "exec-memory.h" |
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#include "ioport.h" |
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#include "bitops.h" |
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#include "kvm.h" |
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#include <assert.h> |
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unsigned memory_region_transaction_depth = 0; |
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typedef struct AddrRange AddrRange; |
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/*
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* Note using signed integers limits us to physical addresses at most
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* 63 bits wide. They are needed for negative offsetting in aliases
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* (large MemoryRegion::alias_offset).
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*/
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struct AddrRange {
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int64_t start; |
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int64_t size; |
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}; |
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static AddrRange addrrange_make(int64_t start, int64_t size)
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{ |
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return (AddrRange) { start, size };
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} |
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static bool addrrange_equal(AddrRange r1, AddrRange r2) |
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{ |
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return r1.start == r2.start && r1.size == r2.size;
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} |
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static int64_t addrrange_end(AddrRange r)
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{ |
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return r.start + r.size;
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} |
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static AddrRange addrrange_shift(AddrRange range, int64_t delta)
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{ |
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range.start += delta; |
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return range;
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} |
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|
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static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
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{ |
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return (r1.start >= r2.start && r1.start < r2.start + r2.size)
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|| (r2.start >= r1.start && r2.start < r1.start + r1.size); |
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} |
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static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
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{ |
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int64_t start = MAX(r1.start, r2.start); |
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/* off-by-one arithmetic to prevent overflow */
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int64_t end = MIN(addrrange_end(r1) - 1, addrrange_end(r2) - 1); |
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return addrrange_make(start, end - start + 1); |
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} |
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|
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struct CoalescedMemoryRange {
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AddrRange addr; |
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QTAILQ_ENTRY(CoalescedMemoryRange) link; |
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}; |
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struct MemoryRegionIoeventfd {
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AddrRange addr; |
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bool match_data;
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uint64_t data; |
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int fd;
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}; |
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static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, |
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MemoryRegionIoeventfd b) |
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{ |
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if (a.addr.start < b.addr.start) {
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return true; |
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} else if (a.addr.start > b.addr.start) { |
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return false; |
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} else if (a.addr.size < b.addr.size) { |
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return true; |
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} else if (a.addr.size > b.addr.size) { |
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return false; |
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} else if (a.match_data < b.match_data) { |
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return true; |
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} else if (a.match_data > b.match_data) { |
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return false; |
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} else if (a.match_data) { |
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if (a.data < b.data) {
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return true; |
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} else if (a.data > b.data) { |
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return false; |
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} |
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} |
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if (a.fd < b.fd) {
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return true; |
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} else if (a.fd > b.fd) { |
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return false; |
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} |
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return false; |
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} |
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static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, |
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MemoryRegionIoeventfd b) |
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{ |
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return !memory_region_ioeventfd_before(a, b)
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&& !memory_region_ioeventfd_before(b, a); |
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} |
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typedef struct FlatRange FlatRange; |
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typedef struct FlatView FlatView; |
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/* Range of memory in the global map. Addresses are absolute. */
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struct FlatRange {
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MemoryRegion *mr; |
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target_phys_addr_t offset_in_region; |
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AddrRange addr; |
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uint8_t dirty_log_mask; |
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bool readable;
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}; |
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/* Flattened global view of current active memory hierarchy. Kept in sorted
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* order.
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*/
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struct FlatView {
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FlatRange *ranges; |
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unsigned nr;
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unsigned nr_allocated;
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}; |
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typedef struct AddressSpace AddressSpace; |
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typedef struct AddressSpaceOps AddressSpaceOps; |
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/* A system address space - I/O, memory, etc. */
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struct AddressSpace {
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const AddressSpaceOps *ops;
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MemoryRegion *root; |
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FlatView current_map; |
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int ioeventfd_nb;
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MemoryRegionIoeventfd *ioeventfds; |
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}; |
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struct AddressSpaceOps {
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void (*range_add)(AddressSpace *as, FlatRange *fr);
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void (*range_del)(AddressSpace *as, FlatRange *fr);
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void (*log_start)(AddressSpace *as, FlatRange *fr);
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void (*log_stop)(AddressSpace *as, FlatRange *fr);
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void (*ioeventfd_add)(AddressSpace *as, MemoryRegionIoeventfd *fd);
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void (*ioeventfd_del)(AddressSpace *as, MemoryRegionIoeventfd *fd);
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}; |
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#define FOR_EACH_FLAT_RANGE(var, view) \
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for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
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static bool flatrange_equal(FlatRange *a, FlatRange *b) |
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{ |
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return a->mr == b->mr
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&& addrrange_equal(a->addr, b->addr) |
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&& a->offset_in_region == b->offset_in_region |
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&& a->readable == b->readable; |
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} |
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static void flatview_init(FlatView *view) |
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{ |
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view->ranges = NULL;
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view->nr = 0;
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view->nr_allocated = 0;
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} |
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/* Insert a range into a given position. Caller is responsible for maintaining
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* sorting order.
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*/
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static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) |
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{ |
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if (view->nr == view->nr_allocated) {
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view->nr_allocated = MAX(2 * view->nr, 10); |
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view->ranges = g_realloc(view->ranges, |
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view->nr_allocated * sizeof(*view->ranges));
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} |
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memmove(view->ranges + pos + 1, view->ranges + pos,
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(view->nr - pos) * sizeof(FlatRange));
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view->ranges[pos] = *range; |
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++view->nr; |
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} |
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static void flatview_destroy(FlatView *view) |
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{ |
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g_free(view->ranges); |
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} |
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static bool can_merge(FlatRange *r1, FlatRange *r2) |
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{ |
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return addrrange_end(r1->addr) == r2->addr.start
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&& r1->mr == r2->mr |
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&& r1->offset_in_region + r1->addr.size == r2->offset_in_region |
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&& r1->dirty_log_mask == r2->dirty_log_mask |
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&& r1->readable == r2->readable; |
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} |
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/* Attempt to simplify a view by merging ajacent ranges */
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static void flatview_simplify(FlatView *view) |
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{ |
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unsigned i, j;
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i = 0;
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while (i < view->nr) {
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j = i + 1;
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while (j < view->nr
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&& can_merge(&view->ranges[j-1], &view->ranges[j])) {
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view->ranges[i].addr.size += view->ranges[j].addr.size; |
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++j; |
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} |
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++i; |
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memmove(&view->ranges[i], &view->ranges[j], |
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(view->nr - j) * sizeof(view->ranges[j]));
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view->nr -= j - i; |
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} |
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} |
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static void memory_region_prepare_ram_addr(MemoryRegion *mr); |
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static void as_memory_range_add(AddressSpace *as, FlatRange *fr) |
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{ |
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ram_addr_t phys_offset, region_offset; |
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memory_region_prepare_ram_addr(fr->mr); |
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phys_offset = fr->mr->ram_addr; |
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region_offset = fr->offset_in_region; |
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/* cpu_register_physical_memory_log() wants region_offset for
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* mmio, but prefers offseting phys_offset for RAM. Humour it.
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*/
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if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM) {
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phys_offset += region_offset; |
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region_offset = 0;
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} |
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if (!fr->readable) {
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phys_offset &= TARGET_PAGE_MASK; |
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} |
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cpu_register_physical_memory_log(fr->addr.start, |
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fr->addr.size, |
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phys_offset, |
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region_offset, |
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fr->dirty_log_mask); |
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} |
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static void as_memory_range_del(AddressSpace *as, FlatRange *fr) |
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{ |
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if (fr->dirty_log_mask) {
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cpu_physical_sync_dirty_bitmap(fr->addr.start, |
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fr->addr.start + fr->addr.size); |
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} |
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cpu_register_physical_memory(fr->addr.start, fr->addr.size, |
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IO_MEM_UNASSIGNED); |
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} |
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static void as_memory_log_start(AddressSpace *as, FlatRange *fr) |
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{ |
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cpu_physical_log_start(fr->addr.start, fr->addr.size); |
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} |
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|
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static void as_memory_log_stop(AddressSpace *as, FlatRange *fr) |
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{ |
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cpu_physical_log_stop(fr->addr.start, fr->addr.size); |
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} |
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static void as_memory_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd) |
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{ |
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int r;
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assert(fd->match_data && fd->addr.size == 4);
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r = kvm_set_ioeventfd_mmio_long(fd->fd, fd->addr.start, fd->data, true);
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if (r < 0) { |
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abort(); |
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} |
288 |
} |
289 |
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static void as_memory_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd) |
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{ |
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int r;
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r = kvm_set_ioeventfd_mmio_long(fd->fd, fd->addr.start, fd->data, false);
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if (r < 0) { |
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abort(); |
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} |
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} |
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static const AddressSpaceOps address_space_ops_memory = { |
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.range_add = as_memory_range_add, |
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.range_del = as_memory_range_del, |
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.log_start = as_memory_log_start, |
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.log_stop = as_memory_log_stop, |
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.ioeventfd_add = as_memory_ioeventfd_add, |
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.ioeventfd_del = as_memory_ioeventfd_del, |
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}; |
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static AddressSpace address_space_memory = {
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.ops = &address_space_ops_memory, |
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}; |
312 |
|
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static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset, |
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unsigned width, bool write) |
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{ |
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const MemoryRegionPortio *mrp;
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for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
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if (offset >= mrp->offset && offset < mrp->offset + mrp->len
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&& width == mrp->size |
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&& (write ? (bool)mrp->write : (bool)mrp->read)) { |
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return mrp;
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} |
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} |
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return NULL; |
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} |
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|
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static void memory_region_iorange_read(IORange *iorange, |
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uint64_t offset, |
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unsigned width,
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uint64_t *data) |
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{ |
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MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange); |
334 |
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if (mr->ops->old_portio) {
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const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false); |
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*data = ((uint64_t)1 << (width * 8)) - 1; |
339 |
if (mrp) {
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*data = mrp->read(mr->opaque, offset - mrp->offset); |
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} |
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return;
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} |
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*data = mr->ops->read(mr->opaque, offset, width); |
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} |
346 |
|
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static void memory_region_iorange_write(IORange *iorange, |
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uint64_t offset, |
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unsigned width,
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uint64_t data) |
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{ |
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MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange); |
353 |
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if (mr->ops->old_portio) {
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const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true); |
356 |
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if (mrp) {
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mrp->write(mr->opaque, offset - mrp->offset, data); |
359 |
} |
360 |
return;
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} |
362 |
mr->ops->write(mr->opaque, offset, data, width); |
363 |
} |
364 |
|
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static const IORangeOps memory_region_iorange_ops = { |
366 |
.read = memory_region_iorange_read, |
367 |
.write = memory_region_iorange_write, |
368 |
}; |
369 |
|
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static void as_io_range_add(AddressSpace *as, FlatRange *fr) |
371 |
{ |
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iorange_init(&fr->mr->iorange, &memory_region_iorange_ops, |
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fr->addr.start,fr->addr.size); |
374 |
ioport_register(&fr->mr->iorange); |
375 |
} |
376 |
|
377 |
static void as_io_range_del(AddressSpace *as, FlatRange *fr) |
378 |
{ |
379 |
isa_unassign_ioport(fr->addr.start, fr->addr.size); |
380 |
} |
381 |
|
382 |
static void as_io_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd) |
383 |
{ |
384 |
int r;
|
385 |
|
386 |
assert(fd->match_data && fd->addr.size == 2);
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387 |
|
388 |
r = kvm_set_ioeventfd_pio_word(fd->fd, fd->addr.start, fd->data, true);
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389 |
if (r < 0) { |
390 |
abort(); |
391 |
} |
392 |
} |
393 |
|
394 |
static void as_io_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd) |
395 |
{ |
396 |
int r;
|
397 |
|
398 |
r = kvm_set_ioeventfd_pio_word(fd->fd, fd->addr.start, fd->data, false);
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399 |
if (r < 0) { |
400 |
abort(); |
401 |
} |
402 |
} |
403 |
|
404 |
static const AddressSpaceOps address_space_ops_io = { |
405 |
.range_add = as_io_range_add, |
406 |
.range_del = as_io_range_del, |
407 |
.ioeventfd_add = as_io_ioeventfd_add, |
408 |
.ioeventfd_del = as_io_ioeventfd_del, |
409 |
}; |
410 |
|
411 |
static AddressSpace address_space_io = {
|
412 |
.ops = &address_space_ops_io, |
413 |
}; |
414 |
|
415 |
/* Render a memory region into the global view. Ranges in @view obscure
|
416 |
* ranges in @mr.
|
417 |
*/
|
418 |
static void render_memory_region(FlatView *view, |
419 |
MemoryRegion *mr, |
420 |
target_phys_addr_t base, |
421 |
AddrRange clip) |
422 |
{ |
423 |
MemoryRegion *subregion; |
424 |
unsigned i;
|
425 |
target_phys_addr_t offset_in_region; |
426 |
int64_t remain; |
427 |
int64_t now; |
428 |
FlatRange fr; |
429 |
AddrRange tmp; |
430 |
|
431 |
base += mr->addr; |
432 |
|
433 |
tmp = addrrange_make(base, mr->size); |
434 |
|
435 |
if (!addrrange_intersects(tmp, clip)) {
|
436 |
return;
|
437 |
} |
438 |
|
439 |
clip = addrrange_intersection(tmp, clip); |
440 |
|
441 |
if (mr->alias) {
|
442 |
base -= mr->alias->addr; |
443 |
base -= mr->alias_offset; |
444 |
render_memory_region(view, mr->alias, base, clip); |
445 |
return;
|
446 |
} |
447 |
|
448 |
/* Render subregions in priority order. */
|
449 |
QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { |
450 |
render_memory_region(view, subregion, base, clip); |
451 |
} |
452 |
|
453 |
if (!mr->terminates) {
|
454 |
return;
|
455 |
} |
456 |
|
457 |
offset_in_region = clip.start - base; |
458 |
base = clip.start; |
459 |
remain = clip.size; |
460 |
|
461 |
/* Render the region itself into any gaps left by the current view. */
|
462 |
for (i = 0; i < view->nr && remain; ++i) { |
463 |
if (base >= addrrange_end(view->ranges[i].addr)) {
|
464 |
continue;
|
465 |
} |
466 |
if (base < view->ranges[i].addr.start) {
|
467 |
now = MIN(remain, view->ranges[i].addr.start - base); |
468 |
fr.mr = mr; |
469 |
fr.offset_in_region = offset_in_region; |
470 |
fr.addr = addrrange_make(base, now); |
471 |
fr.dirty_log_mask = mr->dirty_log_mask; |
472 |
fr.readable = mr->readable; |
473 |
flatview_insert(view, i, &fr); |
474 |
++i; |
475 |
base += now; |
476 |
offset_in_region += now; |
477 |
remain -= now; |
478 |
} |
479 |
if (base == view->ranges[i].addr.start) {
|
480 |
now = MIN(remain, view->ranges[i].addr.size); |
481 |
base += now; |
482 |
offset_in_region += now; |
483 |
remain -= now; |
484 |
} |
485 |
} |
486 |
if (remain) {
|
487 |
fr.mr = mr; |
488 |
fr.offset_in_region = offset_in_region; |
489 |
fr.addr = addrrange_make(base, remain); |
490 |
fr.dirty_log_mask = mr->dirty_log_mask; |
491 |
fr.readable = mr->readable; |
492 |
flatview_insert(view, i, &fr); |
493 |
} |
494 |
} |
495 |
|
496 |
/* Render a memory topology into a list of disjoint absolute ranges. */
|
497 |
static FlatView generate_memory_topology(MemoryRegion *mr)
|
498 |
{ |
499 |
FlatView view; |
500 |
|
501 |
flatview_init(&view); |
502 |
|
503 |
render_memory_region(&view, mr, 0, addrrange_make(0, INT64_MAX)); |
504 |
flatview_simplify(&view); |
505 |
|
506 |
return view;
|
507 |
} |
508 |
|
509 |
static void address_space_add_del_ioeventfds(AddressSpace *as, |
510 |
MemoryRegionIoeventfd *fds_new, |
511 |
unsigned fds_new_nb,
|
512 |
MemoryRegionIoeventfd *fds_old, |
513 |
unsigned fds_old_nb)
|
514 |
{ |
515 |
unsigned iold, inew;
|
516 |
|
517 |
/* Generate a symmetric difference of the old and new fd sets, adding
|
518 |
* and deleting as necessary.
|
519 |
*/
|
520 |
|
521 |
iold = inew = 0;
|
522 |
while (iold < fds_old_nb || inew < fds_new_nb) {
|
523 |
if (iold < fds_old_nb
|
524 |
&& (inew == fds_new_nb |
525 |
|| memory_region_ioeventfd_before(fds_old[iold], |
526 |
fds_new[inew]))) { |
527 |
as->ops->ioeventfd_del(as, &fds_old[iold]); |
528 |
++iold; |
529 |
} else if (inew < fds_new_nb |
530 |
&& (iold == fds_old_nb |
531 |
|| memory_region_ioeventfd_before(fds_new[inew], |
532 |
fds_old[iold]))) { |
533 |
as->ops->ioeventfd_add(as, &fds_new[inew]); |
534 |
++inew; |
535 |
} else {
|
536 |
++iold; |
537 |
++inew; |
538 |
} |
539 |
} |
540 |
} |
541 |
|
542 |
static void address_space_update_ioeventfds(AddressSpace *as) |
543 |
{ |
544 |
FlatRange *fr; |
545 |
unsigned ioeventfd_nb = 0; |
546 |
MemoryRegionIoeventfd *ioeventfds = NULL;
|
547 |
AddrRange tmp; |
548 |
unsigned i;
|
549 |
|
550 |
FOR_EACH_FLAT_RANGE(fr, &as->current_map) { |
551 |
for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
552 |
tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, |
553 |
fr->addr.start - fr->offset_in_region); |
554 |
if (addrrange_intersects(fr->addr, tmp)) {
|
555 |
++ioeventfd_nb; |
556 |
ioeventfds = g_realloc(ioeventfds, |
557 |
ioeventfd_nb * sizeof(*ioeventfds));
|
558 |
ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
|
559 |
ioeventfds[ioeventfd_nb-1].addr = tmp;
|
560 |
} |
561 |
} |
562 |
} |
563 |
|
564 |
address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, |
565 |
as->ioeventfds, as->ioeventfd_nb); |
566 |
|
567 |
g_free(as->ioeventfds); |
568 |
as->ioeventfds = ioeventfds; |
569 |
as->ioeventfd_nb = ioeventfd_nb; |
570 |
} |
571 |
|
572 |
static void address_space_update_topology_pass(AddressSpace *as, |
573 |
FlatView old_view, |
574 |
FlatView new_view, |
575 |
bool adding)
|
576 |
{ |
577 |
unsigned iold, inew;
|
578 |
FlatRange *frold, *frnew; |
579 |
|
580 |
/* Generate a symmetric difference of the old and new memory maps.
|
581 |
* Kill ranges in the old map, and instantiate ranges in the new map.
|
582 |
*/
|
583 |
iold = inew = 0;
|
584 |
while (iold < old_view.nr || inew < new_view.nr) {
|
585 |
if (iold < old_view.nr) {
|
586 |
frold = &old_view.ranges[iold]; |
587 |
} else {
|
588 |
frold = NULL;
|
589 |
} |
590 |
if (inew < new_view.nr) {
|
591 |
frnew = &new_view.ranges[inew]; |
592 |
} else {
|
593 |
frnew = NULL;
|
594 |
} |
595 |
|
596 |
if (frold
|
597 |
&& (!frnew |
598 |
|| frold->addr.start < frnew->addr.start |
599 |
|| (frold->addr.start == frnew->addr.start |
600 |
&& !flatrange_equal(frold, frnew)))) { |
601 |
/* In old, but (not in new, or in new but attributes changed). */
|
602 |
|
603 |
if (!adding) {
|
604 |
as->ops->range_del(as, frold); |
605 |
} |
606 |
|
607 |
++iold; |
608 |
} else if (frold && frnew && flatrange_equal(frold, frnew)) { |
609 |
/* In both (logging may have changed) */
|
610 |
|
611 |
if (adding) {
|
612 |
if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
|
613 |
as->ops->log_stop(as, frnew); |
614 |
} else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { |
615 |
as->ops->log_start(as, frnew); |
616 |
} |
617 |
} |
618 |
|
619 |
++iold; |
620 |
++inew; |
621 |
} else {
|
622 |
/* In new */
|
623 |
|
624 |
if (adding) {
|
625 |
as->ops->range_add(as, frnew); |
626 |
} |
627 |
|
628 |
++inew; |
629 |
} |
630 |
} |
631 |
} |
632 |
|
633 |
|
634 |
static void address_space_update_topology(AddressSpace *as) |
635 |
{ |
636 |
FlatView old_view = as->current_map; |
637 |
FlatView new_view = generate_memory_topology(as->root); |
638 |
|
639 |
address_space_update_topology_pass(as, old_view, new_view, false);
|
640 |
address_space_update_topology_pass(as, old_view, new_view, true);
|
641 |
|
642 |
as->current_map = new_view; |
643 |
flatview_destroy(&old_view); |
644 |
address_space_update_ioeventfds(as); |
645 |
} |
646 |
|
647 |
static void memory_region_update_topology(void) |
648 |
{ |
649 |
if (memory_region_transaction_depth) {
|
650 |
return;
|
651 |
} |
652 |
|
653 |
if (address_space_memory.root) {
|
654 |
address_space_update_topology(&address_space_memory); |
655 |
} |
656 |
if (address_space_io.root) {
|
657 |
address_space_update_topology(&address_space_io); |
658 |
} |
659 |
} |
660 |
|
661 |
void memory_region_transaction_begin(void) |
662 |
{ |
663 |
++memory_region_transaction_depth; |
664 |
} |
665 |
|
666 |
void memory_region_transaction_commit(void) |
667 |
{ |
668 |
assert(memory_region_transaction_depth); |
669 |
--memory_region_transaction_depth; |
670 |
memory_region_update_topology(); |
671 |
} |
672 |
|
673 |
static void memory_region_destructor_none(MemoryRegion *mr) |
674 |
{ |
675 |
} |
676 |
|
677 |
static void memory_region_destructor_ram(MemoryRegion *mr) |
678 |
{ |
679 |
qemu_ram_free(mr->ram_addr); |
680 |
} |
681 |
|
682 |
static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) |
683 |
{ |
684 |
qemu_ram_free_from_ptr(mr->ram_addr); |
685 |
} |
686 |
|
687 |
static void memory_region_destructor_iomem(MemoryRegion *mr) |
688 |
{ |
689 |
cpu_unregister_io_memory(mr->ram_addr); |
690 |
} |
691 |
|
692 |
static void memory_region_destructor_rom_device(MemoryRegion *mr) |
693 |
{ |
694 |
qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); |
695 |
cpu_unregister_io_memory(mr->ram_addr & ~(TARGET_PAGE_MASK | IO_MEM_ROMD)); |
696 |
} |
697 |
|
698 |
void memory_region_init(MemoryRegion *mr,
|
699 |
const char *name, |
700 |
uint64_t size) |
701 |
{ |
702 |
mr->ops = NULL;
|
703 |
mr->parent = NULL;
|
704 |
mr->size = size; |
705 |
mr->addr = 0;
|
706 |
mr->offset = 0;
|
707 |
mr->terminates = false;
|
708 |
mr->readable = true;
|
709 |
mr->destructor = memory_region_destructor_none; |
710 |
mr->priority = 0;
|
711 |
mr->may_overlap = false;
|
712 |
mr->alias = NULL;
|
713 |
QTAILQ_INIT(&mr->subregions); |
714 |
memset(&mr->subregions_link, 0, sizeof mr->subregions_link); |
715 |
QTAILQ_INIT(&mr->coalesced); |
716 |
mr->name = g_strdup(name); |
717 |
mr->dirty_log_mask = 0;
|
718 |
mr->ioeventfd_nb = 0;
|
719 |
mr->ioeventfds = NULL;
|
720 |
} |
721 |
|
722 |
static bool memory_region_access_valid(MemoryRegion *mr, |
723 |
target_phys_addr_t addr, |
724 |
unsigned size)
|
725 |
{ |
726 |
if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
727 |
return false; |
728 |
} |
729 |
|
730 |
/* Treat zero as compatibility all valid */
|
731 |
if (!mr->ops->valid.max_access_size) {
|
732 |
return true; |
733 |
} |
734 |
|
735 |
if (size > mr->ops->valid.max_access_size
|
736 |
|| size < mr->ops->valid.min_access_size) { |
737 |
return false; |
738 |
} |
739 |
return true; |
740 |
} |
741 |
|
742 |
static uint32_t memory_region_read_thunk_n(void *_mr, |
743 |
target_phys_addr_t addr, |
744 |
unsigned size)
|
745 |
{ |
746 |
MemoryRegion *mr = _mr; |
747 |
unsigned access_size, access_size_min, access_size_max;
|
748 |
uint64_t access_mask; |
749 |
uint32_t data = 0, tmp;
|
750 |
unsigned i;
|
751 |
|
752 |
if (!memory_region_access_valid(mr, addr, size)) {
|
753 |
return -1U; /* FIXME: better signalling */ |
754 |
} |
755 |
|
756 |
if (!mr->ops->read) {
|
757 |
return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
|
758 |
} |
759 |
|
760 |
/* FIXME: support unaligned access */
|
761 |
|
762 |
access_size_min = mr->ops->impl.min_access_size; |
763 |
if (!access_size_min) {
|
764 |
access_size_min = 1;
|
765 |
} |
766 |
access_size_max = mr->ops->impl.max_access_size; |
767 |
if (!access_size_max) {
|
768 |
access_size_max = 4;
|
769 |
} |
770 |
access_size = MAX(MIN(size, access_size_max), access_size_min); |
771 |
access_mask = -1ULL >> (64 - access_size * 8); |
772 |
addr += mr->offset; |
773 |
for (i = 0; i < size; i += access_size) { |
774 |
/* FIXME: big-endian support */
|
775 |
tmp = mr->ops->read(mr->opaque, addr + i, access_size); |
776 |
data |= (tmp & access_mask) << (i * 8);
|
777 |
} |
778 |
|
779 |
return data;
|
780 |
} |
781 |
|
782 |
static void memory_region_write_thunk_n(void *_mr, |
783 |
target_phys_addr_t addr, |
784 |
unsigned size,
|
785 |
uint64_t data) |
786 |
{ |
787 |
MemoryRegion *mr = _mr; |
788 |
unsigned access_size, access_size_min, access_size_max;
|
789 |
uint64_t access_mask; |
790 |
unsigned i;
|
791 |
|
792 |
if (!memory_region_access_valid(mr, addr, size)) {
|
793 |
return; /* FIXME: better signalling */ |
794 |
} |
795 |
|
796 |
if (!mr->ops->write) {
|
797 |
mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data); |
798 |
return;
|
799 |
} |
800 |
|
801 |
/* FIXME: support unaligned access */
|
802 |
|
803 |
access_size_min = mr->ops->impl.min_access_size; |
804 |
if (!access_size_min) {
|
805 |
access_size_min = 1;
|
806 |
} |
807 |
access_size_max = mr->ops->impl.max_access_size; |
808 |
if (!access_size_max) {
|
809 |
access_size_max = 4;
|
810 |
} |
811 |
access_size = MAX(MIN(size, access_size_max), access_size_min); |
812 |
access_mask = -1ULL >> (64 - access_size * 8); |
813 |
addr += mr->offset; |
814 |
for (i = 0; i < size; i += access_size) { |
815 |
/* FIXME: big-endian support */
|
816 |
mr->ops->write(mr->opaque, addr + i, (data >> (i * 8)) & access_mask,
|
817 |
access_size); |
818 |
} |
819 |
} |
820 |
|
821 |
static uint32_t memory_region_read_thunk_b(void *mr, target_phys_addr_t addr) |
822 |
{ |
823 |
return memory_region_read_thunk_n(mr, addr, 1); |
824 |
} |
825 |
|
826 |
static uint32_t memory_region_read_thunk_w(void *mr, target_phys_addr_t addr) |
827 |
{ |
828 |
return memory_region_read_thunk_n(mr, addr, 2); |
829 |
} |
830 |
|
831 |
static uint32_t memory_region_read_thunk_l(void *mr, target_phys_addr_t addr) |
832 |
{ |
833 |
return memory_region_read_thunk_n(mr, addr, 4); |
834 |
} |
835 |
|
836 |
static void memory_region_write_thunk_b(void *mr, target_phys_addr_t addr, |
837 |
uint32_t data) |
838 |
{ |
839 |
memory_region_write_thunk_n(mr, addr, 1, data);
|
840 |
} |
841 |
|
842 |
static void memory_region_write_thunk_w(void *mr, target_phys_addr_t addr, |
843 |
uint32_t data) |
844 |
{ |
845 |
memory_region_write_thunk_n(mr, addr, 2, data);
|
846 |
} |
847 |
|
848 |
static void memory_region_write_thunk_l(void *mr, target_phys_addr_t addr, |
849 |
uint32_t data) |
850 |
{ |
851 |
memory_region_write_thunk_n(mr, addr, 4, data);
|
852 |
} |
853 |
|
854 |
static CPUReadMemoryFunc * const memory_region_read_thunk[] = { |
855 |
memory_region_read_thunk_b, |
856 |
memory_region_read_thunk_w, |
857 |
memory_region_read_thunk_l, |
858 |
}; |
859 |
|
860 |
static CPUWriteMemoryFunc * const memory_region_write_thunk[] = { |
861 |
memory_region_write_thunk_b, |
862 |
memory_region_write_thunk_w, |
863 |
memory_region_write_thunk_l, |
864 |
}; |
865 |
|
866 |
static void memory_region_prepare_ram_addr(MemoryRegion *mr) |
867 |
{ |
868 |
if (mr->backend_registered) {
|
869 |
return;
|
870 |
} |
871 |
|
872 |
mr->destructor = memory_region_destructor_iomem; |
873 |
mr->ram_addr = cpu_register_io_memory(memory_region_read_thunk, |
874 |
memory_region_write_thunk, |
875 |
mr, |
876 |
mr->ops->endianness); |
877 |
mr->backend_registered = true;
|
878 |
} |
879 |
|
880 |
void memory_region_init_io(MemoryRegion *mr,
|
881 |
const MemoryRegionOps *ops,
|
882 |
void *opaque,
|
883 |
const char *name, |
884 |
uint64_t size) |
885 |
{ |
886 |
memory_region_init(mr, name, size); |
887 |
mr->ops = ops; |
888 |
mr->opaque = opaque; |
889 |
mr->terminates = true;
|
890 |
mr->backend_registered = false;
|
891 |
} |
892 |
|
893 |
void memory_region_init_ram(MemoryRegion *mr,
|
894 |
DeviceState *dev, |
895 |
const char *name, |
896 |
uint64_t size) |
897 |
{ |
898 |
memory_region_init(mr, name, size); |
899 |
mr->terminates = true;
|
900 |
mr->destructor = memory_region_destructor_ram; |
901 |
mr->ram_addr = qemu_ram_alloc(dev, name, size); |
902 |
mr->backend_registered = true;
|
903 |
} |
904 |
|
905 |
void memory_region_init_ram_ptr(MemoryRegion *mr,
|
906 |
DeviceState *dev, |
907 |
const char *name, |
908 |
uint64_t size, |
909 |
void *ptr)
|
910 |
{ |
911 |
memory_region_init(mr, name, size); |
912 |
mr->terminates = true;
|
913 |
mr->destructor = memory_region_destructor_ram_from_ptr; |
914 |
mr->ram_addr = qemu_ram_alloc_from_ptr(dev, name, size, ptr); |
915 |
mr->backend_registered = true;
|
916 |
} |
917 |
|
918 |
void memory_region_init_alias(MemoryRegion *mr,
|
919 |
const char *name, |
920 |
MemoryRegion *orig, |
921 |
target_phys_addr_t offset, |
922 |
uint64_t size) |
923 |
{ |
924 |
memory_region_init(mr, name, size); |
925 |
mr->alias = orig; |
926 |
mr->alias_offset = offset; |
927 |
} |
928 |
|
929 |
void memory_region_init_rom_device(MemoryRegion *mr,
|
930 |
const MemoryRegionOps *ops,
|
931 |
DeviceState *dev, |
932 |
const char *name, |
933 |
uint64_t size) |
934 |
{ |
935 |
memory_region_init(mr, name, size); |
936 |
mr->terminates = true;
|
937 |
mr->destructor = memory_region_destructor_rom_device; |
938 |
mr->ram_addr = qemu_ram_alloc(dev, name, size); |
939 |
mr->ram_addr |= cpu_register_io_memory(memory_region_read_thunk, |
940 |
memory_region_write_thunk, |
941 |
mr, |
942 |
mr->ops->endianness); |
943 |
mr->ram_addr |= IO_MEM_ROMD; |
944 |
mr->backend_registered = true;
|
945 |
} |
946 |
|
947 |
void memory_region_destroy(MemoryRegion *mr)
|
948 |
{ |
949 |
assert(QTAILQ_EMPTY(&mr->subregions)); |
950 |
mr->destructor(mr); |
951 |
memory_region_clear_coalescing(mr); |
952 |
g_free((char *)mr->name);
|
953 |
g_free(mr->ioeventfds); |
954 |
} |
955 |
|
956 |
uint64_t memory_region_size(MemoryRegion *mr) |
957 |
{ |
958 |
return mr->size;
|
959 |
} |
960 |
|
961 |
void memory_region_set_offset(MemoryRegion *mr, target_phys_addr_t offset)
|
962 |
{ |
963 |
mr->offset = offset; |
964 |
} |
965 |
|
966 |
void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
967 |
{ |
968 |
uint8_t mask = 1 << client;
|
969 |
|
970 |
mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
971 |
memory_region_update_topology(); |
972 |
} |
973 |
|
974 |
bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
|
975 |
unsigned client)
|
976 |
{ |
977 |
assert(mr->terminates); |
978 |
return cpu_physical_memory_get_dirty(mr->ram_addr + addr, 1 << client); |
979 |
} |
980 |
|
981 |
void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr)
|
982 |
{ |
983 |
assert(mr->terminates); |
984 |
return cpu_physical_memory_set_dirty(mr->ram_addr + addr);
|
985 |
} |
986 |
|
987 |
void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
|
988 |
{ |
989 |
FlatRange *fr; |
990 |
|
991 |
FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) { |
992 |
if (fr->mr == mr) {
|
993 |
cpu_physical_sync_dirty_bitmap(fr->addr.start, |
994 |
fr->addr.start + fr->addr.size); |
995 |
} |
996 |
} |
997 |
} |
998 |
|
999 |
void memory_region_set_readonly(MemoryRegion *mr, bool readonly) |
1000 |
{ |
1001 |
/* FIXME */
|
1002 |
} |
1003 |
|
1004 |
void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable) |
1005 |
{ |
1006 |
if (mr->readable != readable) {
|
1007 |
mr->readable = readable; |
1008 |
memory_region_update_topology(); |
1009 |
} |
1010 |
} |
1011 |
|
1012 |
void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
|
1013 |
target_phys_addr_t size, unsigned client)
|
1014 |
{ |
1015 |
assert(mr->terminates); |
1016 |
cpu_physical_memory_reset_dirty(mr->ram_addr + addr, |
1017 |
mr->ram_addr + addr + size, |
1018 |
1 << client);
|
1019 |
} |
1020 |
|
1021 |
void *memory_region_get_ram_ptr(MemoryRegion *mr)
|
1022 |
{ |
1023 |
if (mr->alias) {
|
1024 |
return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
|
1025 |
} |
1026 |
|
1027 |
assert(mr->terminates); |
1028 |
|
1029 |
return qemu_get_ram_ptr(mr->ram_addr);
|
1030 |
} |
1031 |
|
1032 |
static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1033 |
{ |
1034 |
FlatRange *fr; |
1035 |
CoalescedMemoryRange *cmr; |
1036 |
AddrRange tmp; |
1037 |
|
1038 |
FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) { |
1039 |
if (fr->mr == mr) {
|
1040 |
qemu_unregister_coalesced_mmio(fr->addr.start, fr->addr.size); |
1041 |
QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1042 |
tmp = addrrange_shift(cmr->addr, |
1043 |
fr->addr.start - fr->offset_in_region); |
1044 |
if (!addrrange_intersects(tmp, fr->addr)) {
|
1045 |
continue;
|
1046 |
} |
1047 |
tmp = addrrange_intersection(tmp, fr->addr); |
1048 |
qemu_register_coalesced_mmio(tmp.start, tmp.size); |
1049 |
} |
1050 |
} |
1051 |
} |
1052 |
} |
1053 |
|
1054 |
void memory_region_set_coalescing(MemoryRegion *mr)
|
1055 |
{ |
1056 |
memory_region_clear_coalescing(mr); |
1057 |
memory_region_add_coalescing(mr, 0, mr->size);
|
1058 |
} |
1059 |
|
1060 |
void memory_region_add_coalescing(MemoryRegion *mr,
|
1061 |
target_phys_addr_t offset, |
1062 |
uint64_t size) |
1063 |
{ |
1064 |
CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
|
1065 |
|
1066 |
cmr->addr = addrrange_make(offset, size); |
1067 |
QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1068 |
memory_region_update_coalesced_range(mr); |
1069 |
} |
1070 |
|
1071 |
void memory_region_clear_coalescing(MemoryRegion *mr)
|
1072 |
{ |
1073 |
CoalescedMemoryRange *cmr; |
1074 |
|
1075 |
while (!QTAILQ_EMPTY(&mr->coalesced)) {
|
1076 |
cmr = QTAILQ_FIRST(&mr->coalesced); |
1077 |
QTAILQ_REMOVE(&mr->coalesced, cmr, link); |
1078 |
g_free(cmr); |
1079 |
} |
1080 |
memory_region_update_coalesced_range(mr); |
1081 |
} |
1082 |
|
1083 |
void memory_region_add_eventfd(MemoryRegion *mr,
|
1084 |
target_phys_addr_t addr, |
1085 |
unsigned size,
|
1086 |
bool match_data,
|
1087 |
uint64_t data, |
1088 |
int fd)
|
1089 |
{ |
1090 |
MemoryRegionIoeventfd mrfd = { |
1091 |
.addr.start = addr, |
1092 |
.addr.size = size, |
1093 |
.match_data = match_data, |
1094 |
.data = data, |
1095 |
.fd = fd, |
1096 |
}; |
1097 |
unsigned i;
|
1098 |
|
1099 |
for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1100 |
if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
|
1101 |
break;
|
1102 |
} |
1103 |
} |
1104 |
++mr->ioeventfd_nb; |
1105 |
mr->ioeventfds = g_realloc(mr->ioeventfds, |
1106 |
sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
|
1107 |
memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
|
1108 |
sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); |
1109 |
mr->ioeventfds[i] = mrfd; |
1110 |
memory_region_update_topology(); |
1111 |
} |
1112 |
|
1113 |
void memory_region_del_eventfd(MemoryRegion *mr,
|
1114 |
target_phys_addr_t addr, |
1115 |
unsigned size,
|
1116 |
bool match_data,
|
1117 |
uint64_t data, |
1118 |
int fd)
|
1119 |
{ |
1120 |
MemoryRegionIoeventfd mrfd = { |
1121 |
.addr.start = addr, |
1122 |
.addr.size = size, |
1123 |
.match_data = match_data, |
1124 |
.data = data, |
1125 |
.fd = fd, |
1126 |
}; |
1127 |
unsigned i;
|
1128 |
|
1129 |
for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1130 |
if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
|
1131 |
break;
|
1132 |
} |
1133 |
} |
1134 |
assert(i != mr->ioeventfd_nb); |
1135 |
memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
|
1136 |
sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); |
1137 |
--mr->ioeventfd_nb; |
1138 |
mr->ioeventfds = g_realloc(mr->ioeventfds, |
1139 |
sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
1140 |
memory_region_update_topology(); |
1141 |
} |
1142 |
|
1143 |
static void memory_region_add_subregion_common(MemoryRegion *mr, |
1144 |
target_phys_addr_t offset, |
1145 |
MemoryRegion *subregion) |
1146 |
{ |
1147 |
MemoryRegion *other; |
1148 |
|
1149 |
assert(!subregion->parent); |
1150 |
subregion->parent = mr; |
1151 |
subregion->addr = offset; |
1152 |
QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
1153 |
if (subregion->may_overlap || other->may_overlap) {
|
1154 |
continue;
|
1155 |
} |
1156 |
if (offset >= other->offset + other->size
|
1157 |
|| offset + subregion->size <= other->offset) { |
1158 |
continue;
|
1159 |
} |
1160 |
printf("warning: subregion collision %llx/%llx vs %llx/%llx\n",
|
1161 |
(unsigned long long)offset, |
1162 |
(unsigned long long)subregion->size, |
1163 |
(unsigned long long)other->offset, |
1164 |
(unsigned long long)other->size); |
1165 |
} |
1166 |
QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
1167 |
if (subregion->priority >= other->priority) {
|
1168 |
QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); |
1169 |
goto done;
|
1170 |
} |
1171 |
} |
1172 |
QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); |
1173 |
done:
|
1174 |
memory_region_update_topology(); |
1175 |
} |
1176 |
|
1177 |
|
1178 |
void memory_region_add_subregion(MemoryRegion *mr,
|
1179 |
target_phys_addr_t offset, |
1180 |
MemoryRegion *subregion) |
1181 |
{ |
1182 |
subregion->may_overlap = false;
|
1183 |
subregion->priority = 0;
|
1184 |
memory_region_add_subregion_common(mr, offset, subregion); |
1185 |
} |
1186 |
|
1187 |
void memory_region_add_subregion_overlap(MemoryRegion *mr,
|
1188 |
target_phys_addr_t offset, |
1189 |
MemoryRegion *subregion, |
1190 |
unsigned priority)
|
1191 |
{ |
1192 |
subregion->may_overlap = true;
|
1193 |
subregion->priority = priority; |
1194 |
memory_region_add_subregion_common(mr, offset, subregion); |
1195 |
} |
1196 |
|
1197 |
void memory_region_del_subregion(MemoryRegion *mr,
|
1198 |
MemoryRegion *subregion) |
1199 |
{ |
1200 |
assert(subregion->parent == mr); |
1201 |
subregion->parent = NULL;
|
1202 |
QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); |
1203 |
memory_region_update_topology(); |
1204 |
} |
1205 |
|
1206 |
void set_system_memory_map(MemoryRegion *mr)
|
1207 |
{ |
1208 |
address_space_memory.root = mr; |
1209 |
memory_region_update_topology(); |
1210 |
} |
1211 |
|
1212 |
void set_system_io_map(MemoryRegion *mr)
|
1213 |
{ |
1214 |
address_space_io.root = mr; |
1215 |
memory_region_update_topology(); |
1216 |
} |