Revision 739734cb tcg/hppa/tcg-target.c

b/tcg/hppa/tcg-target.c
904 904 
       CPU_TLB_ENTRY_BITS is > 3, so we can't merge that shift with the
905 905 
       add that follows.  */
906 906 
    tcg_out_extr(s, r1, addrlo, TARGET_PAGE_BITS, CPU_TLB_BITS, 0);
907 
    tcg_out_andi(s, r0, addrlo, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
908 907 
    tcg_out_shli(s, r1, r1, CPU_TLB_ENTRY_BITS);
909 908 
    tcg_out_arith(s, r1, r1, TCG_AREG0, INSN_ADDL);
910 909 

  		





  ......




  927
  926
  
    
        tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R20, r1, offset);


  		





  928
  927
  
    
    }


  		





  929
  928
  
    

  		





  
  929
  
    
    /* Compute the value that ought to appear in the TLB for a hit, namely, the page


  		





  
  930
  
    
       of the address.  We include the low N bits of the address to catch unaligned


  		





  
  931
  
    
       accesses and force them onto the slow path.  Do this computation after having


  		





  
  932
  
    
       issued the load from the TLB slot to give the load time to complete.  */


  		





  
  933
  
    
    tcg_out_andi(s, r0, addrlo, TARGET_PAGE_MASK | ((1 << s_bits) - 1));


  		





  
  934
  
    

  		





  930
  935
  
    
    /* If not equal, jump to lab_miss. */


  		





  931
  936
  
    
    if (TARGET_LONG_BITS == 64) {


  		





  932
  937
  
    
        tcg_out_brcond2(s, TCG_COND_NE, TCG_REG_R20, TCG_REG_R23,


  		












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